Ping-pong on the incoming data operations, such as 0-63, the results are 31-0,63-32. Come in and out of the same clock, and are pipelined, the structure of dual-port RAM.

real_module\.lso
...........\data_gen.vhd
...........\data_gen_summary.html
...........\data_in_ce.ngc
...........\data_in_ce.ngr
...........\data_in_ce.udo
...........\data_in_ce.vhd
...........\data_in_ce_wave.fdo
...........\data_in_ce_xst.xrpt
...........\data_out_ce.vhd
...........\data_sort_dual_ram.cmd_log
...........\data_sort_dual_ram.lso
...........\data_sort_dual_ram.ngc
...........\data_sort_dual_ram.ngr
...........\data_sort_dual_ram.prj
...........\data_sort_dual_ram.stx
...........\data_sort_dual_ram.syr
...........\data_sort_dual_ram.udo
...........\data_sort_dual_ram.vhd
...........\data_sort_dual_ram.xst
...........\data_sort_dual_ram_summary.html
...........\data_sort_dual_ram_vhdl.prj
...........\data_sort_dual_ram_wave.fdo
...........\data_sort_dual_ram_xst.xrpt
...........\data_sort_tb.fdo
...........\data_sort_tb.udo
...........\data_sort_tb.vhd
...........\data_sort_tb_wave.fdo
...........\dual_ram.udo
...........\dual_ram.vhd
...........\dual_ram_ip.asy
...........\dual_ram_ip.ngc
...........\dual_ram_ip.sym
...........\dual_ram_ip.v
...........\dual_ram_ip.veo
...........\dual_ram_ip.vhd
...........\dual_ram_ip.vho
...........\dual_ram_ip.xco
...........\dual_ram_ip_flist.txt
...........\dual_ram_ip_readme.txt
...........\dual_ram_ip_xmdf.tcl
...........\dual_ram_wave.fdo
...........\pepExtractor.prj
...........\real_module.ise
...........\real_module.ntrc_log
...........\real_module.restore
...........\..........._xdb\tmp\ise\version
...........\...............\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
...........\...............\...\...\............\..................\.........\HDProject_StrTbl
...........\...............\...\...\............\..................\__stored_object_table__
...........\...............\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
...........\...............\...\...\............\.........\.......\RunOnce_tcl_StrTbl
...........\...............\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
...........\...............\...\...\............\................\................\dpm_project_main_StrTbl
...........\...............\...\...\............\................\................\NameMap
...........\...............\...\...\............\................\................\NameMap_StrTbl
...........\...............\...\...\............\................\__stored_objects__
...........\...............\...\...\............\................\__stored_objects___StrTbl
...........\...............\...\...\............\................\__stored_object_table__
...........\...............\...\...\............\................Gui\GuiProjectData
...........\...............\...\...\............\...................\GuiProjectData_StrTbl
...........\...............\...\...\............\xreport\Gc_RvReportViewer-Current-Module
...........\...............\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
...........\...............\...\...\............\.......\Gc_RvReportViewer-Module-Data-data_gen
...........\...............\...\...\............\.......\Gc_RvReportViewer-Module-Data-data_gen_StrTbl
...........\...............\...\...\............\.......\Gc_RvReportViewer-Module-Data-data_sort_dual_ram
...........\...............\...\...\............\.......\Gc_RvReportViewer-Module-Data-data_sort_dual_ram_StrTbl
...........\...............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
...........\...............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
...........\...............\...\...\..REGISTRY__\Autonym\regkeys
...........\...............\...\...\............\bitgen\regkeys
...........\...............\...\...\............\common\regkeys
...........\...............\...\...\............\.pldfit\regkeys
...........\...............\...\...\............\dumpngdio\regkeys
...........\...............\...\...\............\fuse\regkeys
...........\...............\...\...\............\HierarchicalDesign\HDProject\regkeys
...........\...............\...\...\........

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