Verilog Altera AN459-design-files

AN459-design-files
..................\AN459
..................\.....\AN459.qpf
..................\.....\AN459_top.qsf
..................\.....\AN459_top.sdc
..................\.....\AN459_top.sof
..................\.....\AN459_top.v
..................\.....\ip
..................\.....\..\my_uart
..................\.....\..\.......\HAL
..................\.....\..\.......\...\inc
..................\.....\..\.......\...\...\altera_avalon_uart.h
..................\.....\..\.......\...\...\my_uart_fd.h
..................\.....\..\.......\...\src
..................\.....\..\.......\...\...\my_uart_fd.c
..................\.....\..\.......\...\...\my_uart_init.c
..................\.....\..\.......\...\...\my_uart_ioctl.c
..................\.....\..\.......\...\...\my_uart_read.c
..................\.....\..\.......\...\...\my_uart_write.c
..................\.....\..\.......\inc
..................\.....\..\.......\...\my_uart_regs.h
..................\.....\..\.......\my_uart_sw.tcl
..................\.....\software_examples
..................\.....\.................\app
..................\.....\.................\...\bit_bang_uart
..................\.....\.................\...\.............\bit_bang_uart.c
..................\.....\.................\...\.............\create-this-app
..................\.....\.................\...\hello_world_my_uart
..................\.....\.................\...\...................\create-this-app
..................\.....\.................\...\...................\hello_world.c
..................\.....\.................\bsp
..................\.....\.................\...\hal_my_uart
..................\.....\.................\...\...........\create-this-bsp
..................\.....\.................\...\...........\hal_my_uart.tcl
..................\.....\system.bsf
..................\.....\system.qsys
..................\.....\system.sopcinfo

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