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Spartan3-tutorial1-Document-and-Example

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 729kb
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Spartan3 tutorial1 Document and Example
Packet file list
(Preview for download)
fuse.log
isim
isim.cmd
isim.hdlsourcefiles
isim.log
....\isim.tmp_save
....\.............\_1
....\isimcrash.log
....\simulate_dofile.log
....\simulate_dofile.log_back
....\work
....\....\testbench.vdb
....\....\tut1.vdb
....\_tmp
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....\....\....\p_0017514958.didat
....\....\....\p_0774719531.didat
....\....\....\p_1242562249.didat
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....\....\....\p_3564397177.didat
....\....\....\p_3620187407.didat
....\....\....\p_3972351953.didat
....\....\....\p_4165608084.didat
....\....\std
....\....\...\textio.didat
....\....\work
....\....\....\a_1949178628_0230731466.c
....\....\....\a_1949178628_0230731466.didat
....\....\....\a_1949178628_0230731466.nt.obj
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....\....\....\a_2582627843_3212880686.didat
....\....\....\a_2582627843_3212880686.nt.obj
....\....\....\testbench_isim_beh.exe_lib.c
....\....\....\testbench_isim_beh.exe_lib.nt.dll
....\....\....\testbench_isim_beh.exe_lib.nt.obj
....\....\....\testbench_isim_beh.exe_main.c
testbench_beh.prj
testbench_isim_beh.exe
testbench_isim_beh.wfs
tut1.bgn
tut1.bit
tut1.bld
tut1.cmd_log
tut1.drc
tut1.lso
tut1.ncd
tut1.ngc
tut1.ngd
tut1.ngr
tut1.pad
tut1.par
tut1.pcf
tut1.prj
tut1.ptwx
tut1.stx
tut1.syr
tut1.twr
tut1.twx
tut1.ucf
tut1.unroutes
tut1.ut
tut1.xpi
tut1.xst
Tut1Source.vhd
tut1_guide.ncd
tut1_map.map
tut1_map.mrp
tut1_map.ncd
tut1_map.ngm
tut1_map.xrpt
tut1_ngdbuild.xrpt
tut1_pad.csv
tut1_pad.txt
tut1_par.xrpt
tut1_prev_built.ngd
tut1_summary.html
tut1_summary.xml
tut1_tb.vhd
tut1_usage.xml
tut1_vhdl.prj
tut1_xst.xrpt
tutorial1.ipf
tutorial1.ise
tutorial1.ntrc_log
tutorial1.restore
tutorial1_xdb
.............\cst.xbcd
.............\tmp
.............\...\ise
.............\...\ise.lock
.............\...\...\version
.............\...\...\__OBJSTORE__
.............\...\...\............\Autonym
.............\...\...\............\common
.............\...\...\............\HierarchicalDesign
.............\...\...\............\..................\HDProject
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