this is a standard verilog experence which can dest the vga 256 color

lizi
....\01
....\..\db
....\..\..\logic_util_heursitic.dat
....\..\..\prev_cmp_Verilog1.qmsg
....\..\..\Verilog1.cbx.xml
....\..\..\Verilog1.cmp.rdb
....\..\..\Verilog1.db_info
....\..\..\Verilog1.eda.qmsg
....\..\..\Verilog1.hif
....\..\..\Verilog1.map.qmsg
....\..\..\Verilog1.map_bb.hdb
....\..\..\Verilog1.pre_map.hdb
....\..\..\Verilog1.sld_design_entry.sci
....\..\..\Verilog1.smart_action.txt
....\..\..\Verilog1.tis_db_list.ddb
....\..\Verilog1.flow.rpt
....\..\Verilog1.map.rpt
....\..\Verilog1.map.summary
....\..\Verilog1.qpf
....\..\Verilog1.qsf
....\..\Verilog1.v
....\..\Verilog1.v.bak
....\..\Verilog2.v
....\..\Verilog2.v.bak
....\02
....\..\db
....\..\..\logic_util_heursitic.dat
....\..\..\modisim_test.amm.cdb
....\..\..\modisim_test.asm.qmsg
....\..\..\modisim_test.asm.rdb
....\..\..\modisim_test.asm_labs.ddb
....\..\..\modisim_test.cbx.xml
....\..\..\modisim_test.cmp.bpm
....\..\..\modisim_test.cmp.cdb
....\..\..\modisim_test.cmp.hdb
....\..\..\modisim_test.cmp.kpt
....\..\..\modisim_test.cmp.logdb
....\..\..\modisim_test.cmp.rdb
....\..\..\modisim_test.cmp0.ddb
....\..\..\modisim_test.cmp1.ddb
....\..\..\modisim_test.cmp_merge.kpt
....\..\..\modisim_test.db_info
....\..\..\modisim_test.eda.qmsg
....\..\..\modisim_test.fit.qmsg
....\..\..\modisim_test.hier_info
....\..\..\modisim_test.hif
....\..\..\modisim_test.idb.cdb
....\..\..\modisim_test.lpc.html
....\..\..\modisim_test.lpc.rdb
....\..\..\modisim_test.lpc.txt
....\..\..\modisim_test.map.bpm
....\..\..\modisim_test.map.cdb
....\..\..\modisim_test.map.hdb
....\..\..\modisim_test.map.kpt
....\..\..\modisim_test.map.logdb
....\..\..\modisim_test.map.qmsg
....\..\..\modisim_test.map_bb.cdb
....\..\..\modisim_test.map_bb.hdb
....\..\..\modisim_test.map_bb.logdb
....\..\..\modisim_test.pre_map.cdb
....\..\..\modisim_test.pre_map.hdb
....\..\..\modisim_test.rtlv.hdb
....\..\..\modisim_test.rtlv_sg.cdb
....\..\..\modisim_test.rtlv_sg_swap.cdb
....\..\..\modisim_test.sgdiff.cdb
....\..\..\modisim_test.sgdiff.hdb
....\..\..\modisim_test.sld_design_entry.sci
....\..\..\modisim_test.sld_design_entry_dsc.sci
....\..\..\modisim_test.smart_action.txt
....\..\..\modisim_test.sta.qmsg
....\..\..\modisim_test.sta.rdb
....\..\..\modisim_test.sta_cmp.6_slow.tdb
....\..\..\modisim_test.syn_hier_info
....\..\..\modisim_test.tis_db_list.ddb
....\..\..\prev_cmp_modisim_test.qmsg
....\..\incremental_db
....\..\..............\compiled_partitions
....\..\..............\...................\modisim_test.db_info
....\..\..............\...................\modisim_test.root_partition.cmp.cdb
....\..\..............\...................\modisim_test.root_partition.cmp.dfp
....\..\..............\...................\modisim_test.root_partition.cmp.hdb
....\..\..............\...................\modisim_test.root_partition.cmp.kpt
....\..\..............\...................\modisim_test.root_partition.cmp.logdb
....\..\..............\...................\modisim_test.root_partition.cmp.rcfdb
....\..\..............\...................\modisim_test.root_partition.map.cdb
....\..\..............\...................\modisim_test.root_partition.map.dpi
....\..\..............\...................\modisim_test.root_partition.map.hbdb.cdb
....\..\..............\...................\modisim_test.root_partition.map.hbdb.hb_info
....\..\..............\...................\modisim_test.root_partition.map.hbdb.hdb
....\..\..............\...................\modisim_test.root_partition.map.hbdb.sig
....\..\..............\...................\modisim_test.root_partition.map.hdb
....\..\..............\...................\modisim_test.root_partition.map.kpt
....\..\..............\README
....\..\modisim_test.asm.rpt
....\..\modisim_test.done
....\..\modisim_test.eda.rpt
....\..\modisim_test.fit.rpt
....\..\modisim_test.fit.smsg
....\..\modisim_test.fit.summary

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