Microcontroller through the SPI interface to communicate with the FPGA, a very common

CPLD_SPI\6a26531a-afd2-4517-a09b-1780b91fc30e\ModelSim_ tb_spi().pdf
........\....................................\spi.v
........\6a26531a-afd2-4517-a09b-1780b91fc30e.rar
........\an485_CN.pdf
........\......design_example\code\SPI_Master.v
........\....................\modelsim\SPI_Master.cr.mti
........\....................\........\SPI_Master.mpf
........\....................\........\SPI_Master.v
........\....................\........\SPI_Master_test.v
........\....................\........\SPI_Master_test.v.bak
........\....................\........\transcript
........\....................\........\vsim.wlf
........\....................\........\wave.bmp
........\....................\........\wave.do
........\....................\........\.ork\@s@p@i_@master\verilog.psm
........\....................\........\....\..............\_primary.dat
........\....................\........\....\..............\_primary.vhd
........\....................\........\....\.......master_test\verilog.psm
........\....................\........\....\..................\_primary.dat
........\....................\........\....\..................\_primary.vhd
........\....................\........\....\_info
........\....................\quartus\db\prev_cmp_SPI_Master.asm.qmsg
........\....................\.......\..\prev_cmp_SPI_Master.fit.qmsg
........\....................\.......\..\prev_cmp_SPI_Master.map.qmsg
........\....................\.......\..\prev_cmp_SPI_Master.tan.qmsg
........\....................\.......\..\SPI_Master.db_info
........\....................\.......\..\SPI_Master.eco.cdb
........\....................\.......\..\SPI_Master.sld_design_entry.sci
........\....................\.......\SPI_Master.asm.rpt
........\....................\.......\SPI_Master.done
........\....................\.......\SPI_Master.dpf
........\....................\.......\SPI_Master.fit.rpt
........\....................\.......\SPI_Master.fit.smsg
........\....................\.......\SPI_Master.fit.summary
........\....................\.......\SPI_Master.flow.rpt
........\....................\.......\SPI_Master.map.rpt
........\....................\.......\SPI_Master.map.smsg
........\....................\.......\SPI_Master.map.summary
........\....................\.......\SPI_Master.pin
........\....................\.......\SPI_Master.pof
........\....................\.......\SPI_Master.qpf
........\....................\.......\SPI_Master.qsf
........\....................\.......\SPI_Master.qws
........\....................\.......\SPI_Master.tan.rpt
........\....................\.......\SPI_Master.tan.summary
........\....................\.......\SPI_Master.v
........\....................\.......\SPI_Master_assignment_defaults.qdf
........\....................\testbench\SPI_Master_test.v
........\an485_design_example.zip
........\detail384641.htm
........\Thumbs.db
........\基于CPLD的SPI总线试验简单程序 - forever的日志 - 网易博客.mht
........\基于CPLD的SPI总线试验简单程序【转】 - wenstar的个人空间 - 电子工程世界 - Powered by X-Space.mht
........\an485_design_example\modelsim\work\@s@p@i_@master
........\....................\........\....\@s@p@i_master_test
........\....................\........\work
........\....................\quartus\db
........\....................\code
........\....................\modelsim
........\....................\quartus
........\....................\testbench
........\6a26531a-afd2-4517-a09b-1780b91fc30e
........\an485_design_example
CPLD_SPI

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