xilinx s FPGA dcm example

dcm_test2\dcm2.bgn
.........\dcm2.bit
.........\dcm2.bld
.........\dcm2.cmd_log
.........\dcm2.drc
.........\dcm2.lfp
.........\dcm2.lso
.........\dcm2.msd
.........\dcm2.msk
.........\dcm2.ncd
.........\dcm2.ngc
.........\dcm2.ngd
.........\dcm2.ngr
.........\dcm2.pad
.........\dcm2.par
.........\dcm2.pcf
.........\dcm2.prj
.........\dcm2.rbb
.........\dcm2.rbd
.........\dcm2.stx
.........\dcm2.syr
.........\dcm2.twr
.........\dcm2.twx
.........\dcm2.ucf
.........\dcm2.unroutes
.........\dcm2.ut
.........\dcm2.v
.........\dcm2.xpi
.........\dcm2.xst
.........\dcm2_cclktemp.bit
.........\dcm2_guide.ncd
.........\dcm2_map.map
.........\dcm2_map.mrp
.........\dcm2_map.ncd
.........\dcm2_map.ngm
.........\dcm2_pad.csv
.........\dcm2_pad.txt
.........\dcm2_prev_built.ngd
.........\dcm2_summary.html
.........\dcm2_summary.xml
.........\dcm2_usage.xml
.........\dcm_no.tfi
.........\dcm_no.v
.........\dcm_no.xaw
.........\dcm_no_arwz.ucf
.........\dcm_test2.ise
.........\dcm_test2.ise_ISE_Backup
.........\dcm_test2.ntrc_log
.........\device_usage_statistics.html
.........\PROM_DCM.mcs
.........\PROM_DCM.prm
.........\xaw2verilog.log
.........\.st\dump.xst\dcm2.prj\ntrc.scr
.........\...\work\hdllib.ref
.........\...\....\vlg52\dcm2.bin
.........\...\....\...7C\dcm__no.bin
.........\_impact.cmd
.........\_impact.log
.........\.ngo\netlist.lst
.........\_pace.ucf
.........\.xmsgs\bitgen.xmsgs
.........\......\map.xmsgs
.........\......\ngdbuild.xmsgs
.........\......\par.xmsgs
.........\......\trce.xmsgs
.........\......\xst.xmsgs
.........\xst\dump.xst\dcm2.prj\ngx\notopt
.........\...\........\........\...\opt
.........\...\........\........\ngx
.........\...\........\dcm2.prj
.........\...\work\vlg52
.........\...\....\vlg7C
.........\...\dump.xst
.........\...\projnav.tmp
.........\...\work
.........\xst
.........\_ngo
.........\_xmsgs
dcm_test2

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