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multi8x8

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 384kb
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Introduction - If you have any usage issues, please Google them yourself
The source code for the 8-bit multiplier in VHDL language to describe, from an 8-bit right shift register, two 4-bit adder example into 8-bit adder, a 16-bit data latch form. Using the sum of the shift, from a low starting multiplicand, the multiplier for each bit shift and summed. Finally, to achieve its multiplier function.
Packet file list
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multi8x8\db\multi8x8.asm.qmsg
........\..\multi8x8.asm_labs.ddb
........\..\multi8x8.cbx.xml
........\..\multi8x8.cmp.bpm
........\..\multi8x8.cmp.cdb
........\..\multi8x8.cmp.ecobp
........\..\multi8x8.cmp.hdb
........\..\multi8x8.cmp.logdb
........\..\multi8x8.cmp.rdb
........\..\multi8x8.cmp.tdb
........\..\multi8x8.cmp0.ddb
........\..\multi8x8.db_info
........\..\multi8x8.eco.cdb
........\..\multi8x8.eds_overflow
........\..\multi8x8.fit.qmsg
........\..\multi8x8.hier_info
........\..\multi8x8.hif
........\..\multi8x8.map.bpm
........\..\multi8x8.map.cdb
........\..\multi8x8.map.ecobp
........\..\multi8x8.map.hdb
........\..\multi8x8.map.logdb
........\..\multi8x8.map.qmsg
........\..\multi8x8.map_bb.cdb
........\..\multi8x8.map_bb.hdb
........\..\multi8x8.map_bb.hdbx
........\..\multi8x8.map_bb.logdb
........\..\multi8x8.pre_map.cdb
........\..\multi8x8.pre_map.hdb
........\..\multi8x8.psp
........\..\multi8x8.root_partition.cmp.atm
........\..\multi8x8.root_partition.cmp.dfp
........\..\multi8x8.root_partition.cmp.hdbx
........\..\multi8x8.root_partition.cmp.logdb
........\..\multi8x8.root_partition.cmp.rcf
........\..\multi8x8.root_partition.map.atm
........\..\multi8x8.root_partition.map.hdbx
........\..\multi8x8.root_partition.map.info
........\..\multi8x8.rtlv.hdb
........\..\multi8x8.rtlv_sg.cdb
........\..\multi8x8.rtlv_sg_swap.cdb
........\..\multi8x8.sgdiff.cdb
........\..\multi8x8.sgdiff.hdb
........\..\multi8x8.signalprobe.cdb
........\..\multi8x8.sim.cvwf
........\..\multi8x8.sim.hdb
........\..\multi8x8.sim.qmsg
........\..\multi8x8.sim.rdb
........\..\multi8x8.sld_design_entry.sci
........\..\multi8x8.sld_design_entry_dsc.sci
........\..\multi8x8.syn_hier_info
........\..\multi8x8.tan.qmsg
........\..\multi8x8.tis_db_list.ddb
........\..\multi8x8.tmw_info
........\..\prev_cmp_multi8x8.map.qmsg
........\..\prev_cmp_multi8x8.qmsg
........\..\prev_cmp_multi8x8.sim.qmsg
........\..\wed.wsf
........\multi8x8.asm.rpt
........\multi8x8.done
........\multi8x8.fit.rpt
........\multi8x8.fit.smsg
........\multi8x8.fit.summary
........\multi8x8.flow.rpt
........\multi8x8.map.rpt
........\multi8x8.map.summary
........\multi8x8.pin
........\multi8x8.pof
........\multi8x8.qpf
........\multi8x8.qsf
........\multi8x8.sim.rpt
........\multi8x8.sof
........\multi8x8.tan.rpt
........\multi8x8.tan.summary
........\multi8x8.vhd
........\multi8x8.vhd.bak
........\multi8x8.vwf
........\db
multi8x8
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