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EPM240verilog

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 2.54mb
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  • Author :饶**
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Introduction - If you have any usage issues, please Google them yourself
ledverilog seg7_verilog ex7_Cyclone_PLL_Test1 ex8_cyclone_PLL_Test2 EP1C3 based on advanced experimental keyscanverilog
Packet file list
(Preview for download)
基于EPM240的入门实验\EX1\clkdivverilog\.sopc_builder\install.ptf
....................\...\.............\clkdiv.asm.rpt
....................\...\.............\clkdiv.cdf
....................\...\.............\clkdiv.done
....................\...\.............\clkdiv.dpf
....................\...\.............\clkdiv.fit.rpt
....................\...\.............\clkdiv.fit.smsg
....................\...\.............\clkdiv.fit.summary
....................\...\.............\clkdiv.flow.rpt
....................\...\.............\clkdiv.map.rpt
....................\...\.............\clkdiv.map.summary
....................\...\.............\clkdiv.pin
....................\...\.............\clkdiv.pof
....................\...\.............\clkdiv.qpf
....................\...\.............\clkdiv.qsf
....................\...\.............\clkdiv.qws
....................\...\.............\clkdiv.tan.rpt
....................\...\.............\clkdiv.tan.summary
....................\...\.............\clkdiv.v
....................\...\.............\clkdiv.v.bak
....................\...\.............\clkdiv_assignment_defaults.qdf
....................\...\.............\db\clkdiv.asm.qmsg
....................\...\.............\..\clkdiv.asm_labs.ddb
....................\...\.............\..\clkdiv.cbx.xml
....................\...\.............\..\clkdiv.cmp.cdb
....................\...\.............\..\clkdiv.cmp.hdb
....................\...\.............\..\clkdiv.cmp.kpt
....................\...\.............\..\clkdiv.cmp.logdb
....................\...\.............\..\clkdiv.cmp.rdb
....................\...\.............\..\clkdiv.cmp.tdb
....................\...\.............\..\clkdiv.cmp0.ddb
....................\...\.............\..\clkdiv.db_info
....................\...\.............\..\clkdiv.eco.cdb
....................\...\.............\..\clkdiv.fit.qmsg
....................\...\.............\..\clkdiv.hier_info
....................\...\.............\..\clkdiv.hif
....................\...\.............\..\clkdiv.lpc.html
....................\...\.............\..\clkdiv.lpc.rdb
....................\...\.............\..\clkdiv.lpc.txt
....................\...\.............\..\clkdiv.map.cdb
....................\...\.............\..\clkdiv.map.hdb
....................\...\.............\..\clkdiv.map.logdb
....................\...\.............\..\clkdiv.map.qmsg
....................\...\.............\..\clkdiv.pre_map.cdb
....................\...\.............\..\clkdiv.pre_map.hdb
....................\...\.............\..\clkdiv.rtlv.hdb
....................\...\.............\..\clkdiv.rtlv_sg.cdb
....................\...\.............\..\clkdiv.rtlv_sg_swap.cdb
....................\...\.............\..\clkdiv.sgdiff.cdb
....................\...\.............\..\clkdiv.sgdiff.hdb
....................\...\.............\..\clkdiv.sld_design_entry.sci
....................\...\.............\..\clkdiv.sld_design_entry_dsc.sci
....................\...\.............\..\clkdiv.syn_hier_info
....................\...\.............\..\clkdiv.tan.qmsg
....................\...\.............\..\clkdiv.tis_db_list.ddb
....................\...\.............\..\clkdiv_global_asgn_op.abo
....................\...\.............\..\prev_cmp_clkdiv.asm.qmsg
....................\...\.............\..\prev_cmp_clkdiv.fit.qmsg
....................\...\.............\..\prev_cmp_clkdiv.map.qmsg
....................\...\.............\..\prev_cmp_clkdiv.qmsg
....................\...\.............\..\prev_cmp_clkdiv.tan.qmsg
....................\...\.............\incremental_db\compiled_partitions\clkdiv.root_partition.map.kpt
....................\...\.............\..............\README
....................\...\.............\sopc_builder_debug_log.txt
....................\...0\verilogsram\db\prev_cmp_sram_test.asm.qmsg
....................\....\...........\..\prev_cmp_sram_test.eda.qmsg
....................\....\...........\..\prev_cmp_sram_test.fit.qmsg
....................\....\...........\..\prev_cmp_sram_test.map.qmsg
....................\....\.....
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