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Perl_for_CRC

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 88kb
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  • Author :尤****
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Introduction - If you have any usage issues, please Google them yourself
Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data communication systems and other serial data transmission systems. CRC is based on polynomial manipulations using modulo arithmetic. Some of the common Cyclic Redundancy Check standards are CRC-8, CRC-12, CRC-16, CRC-32, and CRC-CCIT. This application note discusses the implementation of an IEEE 802.3 CRC in a Virtex ™ device. The reference design provided with this application note provides Verilog point solutions for CRC-8 , CRC-12, CRC-16, and CRC-32. The Perl script (crcgen.pl) used to generate this code is also included. The script generates Verilog source for CRC circuitry of any width (8, 12, 16, 32 ), any polynomial, and any data input width.
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xapp209_crc.pdf
.......\crc12_4.v
.......\crc16_8.v
.......\crc32_8.v
.......\crc8_4.v
.......\crcgen.pl
.......\crc_ccit_8.v
.......\readme
.......\readme.txt
xapp209
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