2.5 divider design using VHDL

deccount2.5\cmp_state.ini
...........\deccount.asm.rpt
...........\deccount.done
...........\deccount.fit.eqn
...........\deccount.fit.rpt
...........\deccount.flow.rpt
...........\deccount.map.eqn
...........\deccount.map.rpt
...........\deccount.pin
...........\deccount.pof
...........\deccount.qpf
...........\deccount.qsf
...........\deccount.qws
...........\deccount.sim.rpt
...........\deccount.sof
...........\deccount.tan.rpt
...........\deccount.tan.summary
...........\deccount.vhd
...........\deccount.vwf
...........\deccount_assignment_defaults.qdf
...........\sim.cfg
...........\db\deccount-sim.vwf
...........\..\deccount.db_info
...........\..\deccount.eco.cdb
...........\..\deccount.sld_design_entry.sci
...........\..\deccount_cmp.qrpt
...........\..\deccount_hier_info
...........\..\deccount_sim.qrpt
...........\..\deccount_syn_hier_info
...........\db
deccount2.5

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