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DE2ban70foudianyuansuan

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 27.05mb
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  • Author :刘***
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Introduction - If you have any usage issues, please Google them yourself
Custom instructions for operation, comparative performance, development environment for quartus.
Packet file list
(Preview for download)
DE2-70_Basic_Computer\.sopc_builder\filters.xml
.....................\.............\install.ptf
.....................\.............\install2.ptf
.....................\.............\preferences.xml
.....................\altera_up_rs232_counters.v
.....................\altera_up_rs232_in_deserializer.v
.....................\altera_up_rs232_out_serializer.v
.....................\altera_up_sync_fifo.v
.....................\.pp_software\getting_started_C\getting_started.c
.....................\............\................s\getting_started.s
.....................\............\interrupt_example_C\exception_handler.c
.....................\............\...................\interrupt_example.c
.....................\............\...................\interval_timer_ISR.c
.....................\............\...................\key_codes.h
.....................\............\...................\nios2_ctrl_reg_macros.h
.....................\............\...................\pushbutton_ISR.c
.....................\............\..................s\exception_handler.s
.....................\............\...................\interrupt_example.s
.....................\............\...................\interval_timer.s
.....................\............\...................\key_codes.s
.....................\............\...................\pushbutton_ISR.s
.....................\............\JTAG_UART_C\JTAG_UART.c
.....................\............\..........s\JTAG_UART.s
.....................\............\test_Basic_Computer_C\address_map.h
.....................\............\.....................\exceptions.c
.....................\............\.....................\interval_timer.c
.....................\............\.....................\nios2_ctrl_reg_macros.h
.....................\............\.....................\pushbutton.c
.....................\............\.....................\test_Basic_Computer.c
.....................\............\....................s\address_map.s
.....................\............\.....................\exceptions.s
.....................\............\.....................\interval_timer.s
.....................\............\.....................\pushbutton.s
.....................\............\.....................\test_Basic_Computer.s
.....................\CPU.ocp
.....................\CPU.sdc
.....................\CPU.v
.....................\CPU_fpoint.v
.....................\CPU_ic_tag_ram.mif
.....................\CPU_jtag_debug_module_sysclk.v
.....................\CPU_jtag_debug_module_tck.v
.....................\CPU_jtag_debug_module_wrapper.v
.....................\CPU_mult_cell.v
.....................\CPU_ociram_default_contents.mif
.....................\CPU_oci_test_bench.v
.....................\CPU_rf_ram.mif
.....................\CPU_rf_ram_a.mif
.....................\CPU_rf_ram_b.mif
.....................\CPU_test_bench.v
.....................\db\add_sub_55i.tdf
.....................\..\add_sub_69i.tdf
.....................\..\add_sub_6jf.tdf
.....................\..\add_sub_7pb.tdf
.....................\..\add_sub_bli.tdf
.....................\..\add_sub_bnf.tdf
.....................\..\add_sub_bsi.tdf
.....................\..\add_sub_cti.tdf
.....................\..\add_sub_egg.tdf
.....................\..\add_sub_fjd.tdf
.....................\..\add_sub_g6i.tdf
.....................\..\add_sub_gvd.tdf
.....................\..\add_sub_lre.tdf
.....................\..\add_sub_mlf.tdf
.....................\..\add_sub_nqe.tdf
.....................\..\add_sub_r3c.tdf
.....................\..\add_sub_r6f.tdf
.....................\..\add_sub_s6f.tdf
.....................\..\add_sub_saf.tdf
.....................\..\add_sub_t7f.tdf
.....................\..\add_sub_taf.tdf
.....................\..\add_sub_u7f.tdf
.....................\..\add_sub_uaf.tdf
.....................\..\add_sub_vbf.tdf
.....................\..\add_sub_voh.tdf
.....................\..\altsyncram_3a81.tdf
.....................\..\altsyncram_6a22.tdf
.....................\..\altsyncram_6ta1.tdf
.....................\..\altsyncram_9tl1.tdf
......
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