Design using Verilog HDL language a taxi meter, it has time display, billing and simulation taxi start, stop, reset and other functions, and set dynamically display scanning circuit and the corresponding time fare, shows the hardware description language Verilog-HDL design advantages of digital logic circuits.

EDA出租车计费系统\db\test.asm.qmsg
.................\..\test.cbx.xml
.................\..\test.cmp.cdb
.................\..\test.cmp.hdb
.................\..\test.cmp.kpt
.................\..\test.cmp.logdb
.................\..\test.cmp.rdb
.................\..\test.cmp.tdb
.................\..\test.cmp0.ddb
.................\..\test.dbp
.................\..\test.db_info
.................\..\test.eco.cdb
.................\..\test.fit.qmsg
.................\..\test.hier_info
.................\..\test.hif
.................\..\test.map.cdb
.................\..\test.map.hdb
.................\..\test.map.logdb
.................\..\test.map.qmsg
.................\..\test.pre_map.cdb
.................\..\test.pre_map.hdb
.................\..\test.psp
.................\..\test.rtlv.hdb
.................\..\test.rtlv_sg.cdb
.................\..\test.rtlv_sg_swap.cdb
.................\..\test.sgdiff.cdb
.................\..\test.sgdiff.hdb
.................\..\test.signalprobe.cdb
.................\..\test.sim.hdb
.................\..\test.sim.qmsg
.................\..\test.sim.rdb
.................\..\test.sim_ori.vwf
.................\..\test.sld_design_entry.sci
.................\..\test.sld_design_entry_dsc.sci
.................\..\test.syn_hier_info
.................\..\test.tan.qmsg
.................\..\wed.zsf
.................\ntaix.bsf
.................\ntaix.v
.................\sel.bsf
.................\sel.v
.................\taxi.vwf
.................\test.asm.rpt
.................\test.bdf
.................\test.done
.................\test.fit.rpt
.................\test.fit.smsg
.................\test.fit.summary
.................\test.flow.rpt
.................\test.map.rpt
.................\test.map.summary
.................\test.pin
.................\test.qpf
.................\test.qsf
.................\test.qws
.................\test.sim.rpt
.................\test.tan.rpt
.................\test.tan.summary
.................\db
EDA出租车计费系统

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