Using the C8051F005 development board, the control FPGA and high-speed DA to DDS, two DDS output, a difference of 90 or 180 or 0

No.4
....\Desktop.ini
....\FPGA_DDS000
....\...........\1.wsp
....\...........\c8051F000.h
....\...........\constant.#1
....\...........\constant.#2
....\...........\constant.#3
....\...........\constant.h
....\...........\cyglink.txt
....\...........\Desktop.ini
....\...........\f_define.#1
....\...........\f_define.#2
....\...........\f_define.#3
....\...........\f_define.h
....\...........\MAIN
....\...........\main.#1
....\...........\main.#2
....\...........\main.#3
....\...........\main.c
....\...........\main.LST
....\...........\MAIN.M51
....\...........\main.OBJ
....\...........\tmp.out
....\...........\ziku.h
....\FPGA_DDS001
....\...........\1.wsp
....\...........\c8051F000.h
....\...........\constant.#1
....\...........\constant.#2
....\...........\constant.#3
....\...........\constant.h
....\...........\cyglink.txt
....\...........\Desktop.ini
....\...........\f_define.#1
....\...........\f_define.#2
....\...........\f_define.#3
....\...........\f_define.h
....\...........\MAIN
....\...........\main.#1
....\...........\main.#2
....\...........\main.#3
....\...........\main.c
....\...........\main.LST
....\...........\MAIN.M51
....\...........\main.OBJ
....\...........\tmp.out
....\...........\ziku.#1
....\...........\ziku.#2
....\...........\ziku.#3
....\...........\ziku.h
....\FPGA_DDS066_1
....\.............\1.wsp
....\.............\c8051F000.h
....\.............\constant.#1
....\.............\constant.#2
....\.............\constant.#3
....\.............\constant.h
....\.............\cyglink.txt
....\.............\Desktop.ini
....\.............\f_define.#1
....\.............\f_define.#2
....\.............\f_define.#3
....\.............\f_define.h
....\.............\MAIN
....\.............\main.#1
....\.............\main.#2
....\.............\main.#3
....\.............\main.c
....\.............\main.LST
....\.............\MAIN.M51
....\.............\main.OBJ
....\.............\tmp.out
....\.............\ziku.#1
....\.............\ziku.#2
....\.............\ziku.#3
....\.............\ziku.h
....\FPGA_DDS066_2
....\.............\1.wsp
....\.............\c8051F000.h
....\.............\constant.#1
....\.............\constant.#2
....\.............\constant.#3
....\.............\constant.h
....\.............\cyglink.txt
....\.............\Desktop.ini
....\.............\f_define.#1
....\.............\f_define.#2
....\.............\f_define.#3
....\.............\f_define.h
....\.............\MAIN
....\.............\main.#1
....\.............\main.#2
....\.............\main.#3
....\.............\main.c
....\.............\main.LST
....\.............\MAIN.M51
....\.............\main.OBJ
....\.............\tmp.out
....\.............\ziku.#1

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