memory model of a ddr

ddr_in\cmp_state.ini
......\ddr_in.bdf
......\ddr_in.csf
......\ddr_in.csf.rpt
......\ddr_in.eqn
......\ddr_in.esf
......\ddr_in.pin
......\ddr_in.pof
......\ddr_in.psf
......\ddr_in.quartus
......\ddr_in.qws
......\ddr_in.sof
......\ddr_in.ssf
......\ddr_in.ssf.rpt
......\ddr_in.vwf
......\Debug.fsf
......\Release.fsf
......\serv_req_info.txt
ddr_in
....out\cmp_state.ini
.......\ddr_out.bdf
.......\ddr_out.csf
.......\ddr_out.csf.rpt
.......\ddr_out.eqn
.......\ddr_out.esf
.......\ddr_out.pin
.......\ddr_out.pof
.......\ddr_out.psf
.......\ddr_out.quartus
.......\ddr_out.qws
.......\ddr_out.sof
.......\ddr_out.ssf
.......\ddr_out.ssf.rpt
.......\ddr_out.vwf
.......\Debug.fsf
.......\mux2_1.bsf
.......\mux2_1.inc
.......\mux2_1.tdf
.......\mux2_1_inst.tdf
.......\Release.fsf
.......\serv_req_info.txt
ddr_out
....bidir\cmp_state.ini
.........\ddr_bidir.bdf
.........\ddr_bidir.csf
.........\ddr_bidir.csf.rpt
.........\ddr_bidir.eqn
.........\ddr_bidir.esf
.........\ddr_bidir.pin
.........\ddr_bidir.pof
.........\ddr_bidir.psf
.........\ddr_bidir.quartus
.........\ddr_bidir.qws
.........\ddr_bidir.sof
.........\ddr_bidir.ssf
.........\ddr_bidir.ssf.rpt
.........\ddr_bidir.vwf
.........\ddr_biidr.csf
.........\Debug.fsf
.........\lpm_mux0.bsf
.........\lpm_mux0.inc
.........\lpm_mux0.tdf
.........\lpm_mux0_inst.tdf
.........\Release.fsf
.........\serv_req_info.txt
ddr_bidir

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