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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 215kb
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  • Author :球****
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ADC8 digital conversion, display voltage, low accuracy, e-contest training, show the voltage required to break down their numbers
Packet file list
(Preview for download)
0809显示4-1成功\08
...............\08.hex
...............\08.lnp
...............\08.M51
...............\08.plg
...............\0809yi
...............\0809yi.c
...............\0809yi.hex
...............\0809yi.lnp
...............\0809yi.LST
...............\0809yi.M51
...............\0809yi.OBJ
...............\0809yi.Opt
...............\0809yi.plg
...............\0809yi.Uv2
...............\0809yi_Opt.Bak
...............\0809档位.PWI
...............\0809档位741.DSN
...............\0809档位OP-07串口.DSN
...............\0809档位OP-07串口.PWI
...............\ADDISP.PWI
...............\Last Loaded 0809档位.DBK
...............\Last Loaded 0809档位OP-07串口.DBK
...............\Last Loaded ADDISP.DBK
...............\Last Loaded OP-07串口.DBK
...............\OP-07串口.DSN
...............\OP-07串口.PWI
...............\STARTUP.A51
...............\STARTUP.LST
...............\STARTUP.OBJ
...............\显示档位.DSN
...............\显示档位.PWI
0809显示4-1成功
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