nios2 internship network communications based on dm9000a chip. Version of the de2-70 on the practical development of the internal source with it, nios software folder on the source below.

nios2net1\.sopc_builder\install.ptf
.........\.............\install2.ptf
.........\.............\preferences.xml
.........\Altera_UP_Avalon_PS2.v
.........\Altera_UP_PS2.v
.........\Altera_UP_PS2_Command_Out.v
.........\Altera_UP_PS2_Data_In.v
.........\altpllpll.bsf
.........\altpllpll.ppf
.........\altpllpll.v
.........\AUDIO.v
.........\clock_0.v
.........\clock_1.v
.........\cpu.ocp
.........\cpu.v
.........\cpu_bht_ram.mif
.........\cpu_dc_tag_ram.mif
.........\cpu_ic_tag_ram.mif
.........\cpu_jtag_debug_module.v
.........\cpu_jtag_debug_module_wrapper.v
.........\cpu_mult_cell.v
.........\cpu_ociram_default_contents.mif
.........\cpu_rf_ram_a.mif
.........\cpu_rf_ram_b.mif
.........\cpu_test_bench.v
.........\DE2_70_NET.asm.rpt
.........\DE2_70_NET.cdf
.........\DE2_70_NET.done
.........\DE2_70_NET.dpf
.........\DE2_70_NET.fit.rpt
.........\DE2_70_NET.fit.smsg
.........\DE2_70_NET.fit.summary
.........\DE2_70_NET.flow.rpt
.........\DE2_70_NET.jdi
.........\DE2_70_NET.map.rpt
.........\DE2_70_NET.map.smsg
.........\DE2_70_NET.map.summary
.........\DE2_70_NET.pin
.........\DE2_70_NET.pof
.........\DE2_70_NET.qpf
.........\DE2_70_NET.qsf
.........\DE2_70_NET.qsf.bak
.........\DE2_70_NET.qws
.........\DE2_70_NET.sof
.........\DE2_70_NET.tan.rpt
.........\DE2_70_NET.tan.summary
.........\DE2_70_NET.v
.........\DE2_70_NET.v.bak
.........\DE2_70_NET_assignment_defaults.qdf
.........\DE2_70_NET_SOPC.sop
.........\DE2_70_SOPC.bsf
.........\DE2_70_SOPC.ptf
.........\DE2_70_SOPC.ptf.bak
.........\DE2_70_SOPC.ptf.pre_generation_ptf
.........\DE2_70_SOPC.qip
.........\DE2_70_SOPC.sopc
.........\DE2_70_SOPC.v
.........\DE2_70_SOPC_generation_script
.........\DE2_70_SOPC_log.txt
.........\DE2_70_SOPC_setup_quartus.tcl
.........\.............im\atail-f.pl
.........\...............\dummy_file
.........\...............\jtag_uart_input_mutex.dat
.........\...............\jtag_uart_input_stream.dat
.........\...............\jtag_uart_output_stream.dat
.........\...............\uart_input_data_mutex.dat
.........\...............\uart_input_data_stream.dat
.........\...............\uart_log_module.txt
.........\DM9000A.v
.........\DM9000A_IF_inst.v
.........\i2c_sclk.v
.........\i2c_sdat.v
.........\.ncremental_db\README
.........\IP\TERASIC_AUDIO\hdl\AUDIO_ADC.v
.........\..\.............\...\AUDIO_DAC.v
.........\..\.............\...\audio_fifo.v
.........\..\.............\...\audio_fifo_wave0.jpg
.........\..\.............\...\audio_fifo_wave1.jpg
.........\..\.............\...\audio_fifo_waveforms.html
.........\..\.............\...\AUDIO_IF.v
.........\..\.............\...\AUDIO_IF.v.bak
.........\..\.............\...\AUDIO_IF_hw.tcl
.........\..\.............\software\AUDIO.c
.........\..\.............\........\AUDIO.h
.........\..\.............\........\AUDIO_REG.h
.........\..\........Binary_VGA_Controller\hdl\Binary_VGA_Control_IF_hw.tcl
.........\..\.............................\...\Binary_VGA_Control_IF_hw.tcl~
.........\..\.............................\...\Img_DATA.hex
.........\..\.............................\...\Img_RAM.v
.........\..\.............................\...\VGA_Controller.v
.........\..\.............................\...\VGA_NIOS_CTRL.v
.........\..\.............................\...\VGA_NIOS_CTRL.v.bak
.........\..\.............................\...\VGA_OSD_RAM.v
.........\..\.............................\...\VGA_Param.h
.........\..\........DM9000A\hdl\DM9000A_IF.v
.........\..\...............\...\DM9000A_IF_hw.tcl
.........\..\...............\...\DM9000A_IF_hw.tcl~
.........\..\...............\software\DM9000A.C
.........\..\...............\........\DM9000A.H
.........\..\........ISP1362\hdl\ISP1362_IF.v

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