Verilog language written using the 16* 16 dot matrix, to achieve left, right, pause, reset and other functions, you can customize RAM, change the display content.

EDA_dianzhen\clk_cnt.bsf
............\clk_cnt.v
............\clk_cnt.v.bak
............\dianzhen.done
............\dianzhen.dpf
............\dianzhen.fit.smsg
............\dianzhen.fit.summary
............\dianzhen.map.smsg
............\dianzhen.map.summary
............\dianzhen.pin
............\dianzhen.pof
............\dianzhen.qpf
............\dianzhen.qsf
............\dianzhen.sof
............\dianzhen.tan.summary
............\dianzhen_assignment_defaults.qdf
............\dianzhen_top.bdf
............\EDA技能实训实训报告_.doc
............\jsq_add.bsf
............\jsq_add.v
............\ram.tdf
............\ram_inst.tdf
............\rom.bsf
............\rom.v
............\rom.v.bak
............\incremental_db\README
............\..............\compiled_partitions\dianzhen.root_partition.map.kpt
............\db\dianzhen.cbx.xml
............\..\dianzhen.cmp.kpt
............\..\dianzhen.db_info
............\..\dianzhen.hier_info
............\..\dianzhen.hif
............\..\dianzhen.smart_action.txt
............\..\dianzhen.syn_hier_info
............\..\dianzhen.tmw_info
............\..\logic_util_heursitic.dat
............\..\prev_cmp_dianzhen.qmsg
............\..\prev_cmp_dianzhen.map.qmsg
............\..\prev_cmp_dianzhen.fit.qmsg
............\..\prev_cmp_dianzhen.asm.qmsg
............\..\prev_cmp_dianzhen.tan.qmsg
............\..\dianzhen.map.qmsg
............\..\dianzhen.rtlv_sg.cdb
............\..\dianzhen.rtlv.hdb
............\..\dianzhen.rtlv_sg_swap.cdb
............\..\dianzhen.lpc.txt
............\..\dianzhen.lpc.html
............\..\dianzhen.lpc.rdb
............\..\dianzhen.pre_map.hdb
............\..\dianzhen.pre_map.cdb
............\..\dianzhen.map.logdb
............\..\dianzhen.sgdiff.cdb
............\..\dianzhen.sgdiff.hdb
............\..\dianzhen.sld_design_entry_dsc.sci
............\..\dianzhen.map.cdb
............\..\dianzhen.map.hdb
............\..\dianzhen.fit.qmsg
............\..\dianzhen.cmp.logdb
............\..\dianzhen.tis_db_list.ddb
............\..\dianzhen.asm.qmsg
............\..\dianzhen.asm_labs.ddb
............\..\dianzhen.asm.rdb
............\..\dianzhen.tan.qmsg
............\..\dianzhen.cmp.tdb
............\..\dianzhen.cmp0.ddb
............\..\dianzhen.cmp.cdb
............\..\dianzhen.cmp.hdb
............\..\dianzhen.cmp.rdb
............\..\dianzhen.sld_design_entry.sci
............\..\dianzhen.eco.cdb
............\dianzhen.map.rpt
............\dianzhen.fit.rpt
............\dianzhen.asm.rpt
............\dianzhen.tan.rpt
............\dianzhen.flow.rpt
............\dianzhen.qws
............\incremental_db\compiled_partitions
............\incremental_db
............\db
EDA_dianzhen

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