FPGA verilog language written with VGA display program, I do a course design, displayed on the monitor my student number 20082831. Of course, can be changed, there are three files, one header file.

zm1\colormap.asm.rpt
...\colormap.done
...\colormap.fit.eqn
...\colormap.fit.rpt
...\colormap.fit.summary
...\colormap.flow.rpt
...\colormap.map.eqn
...\colormap.map.rpt
...\colormap.map.summary
...\colormap.pin
...\colormap.pof
...\colormap.qsf
...\colormap.qws
...\colormap.sof
...\colormap.tan.rpt
...\colormap.tan.summary
...\colormap.vhd
...\colormap.vhd.bak
...\db\colormap.asm.qmsg
...\..\colormap.cbx.xml
...\..\colormap.cmp.cdb
...\..\colormap.cmp.hdb
...\..\colormap.cmp.qrpt
...\..\colormap.cmp.rdb
...\..\colormap.cmp.tdb
...\..\colormap.cmp0.ddb
...\..\colormap.dbp
...\..\colormap.db_info
...\..\colormap.eco.cdb
...\..\colormap.fit.qmsg
...\..\colormap.hier_info
...\..\colormap.hif
...\..\colormap.map.cdb
...\..\colormap.map.hdb
...\..\colormap.map.qmsg
...\..\colormap.pre_map.cdb
...\..\colormap.pre_map.hdb
...\..\colormap.psp
...\..\colormap.rpp.qmsg
...\..\colormap.rtlv.hdb
...\..\colormap.rtlv_sg.cdb
...\..\colormap.rtlv_sg_swap.cdb
...\..\colormap.sgate.rvd
...\..\colormap.sgate_sm.rvd
...\..\colormap.sgdiff.cdb
...\..\colormap.sgdiff.hdb
...\..\colormap.sld_design_entry.sci
...\..\colormap.sld_design_entry_dsc.sci
...\..\colormap.syn_hier_info
...\..\colormap.tan.qmsg
...\..\vgacore.asm.qmsg
...\..\vgacore.cbx.xml
...\..\vgacore.cmp.cdb
...\..\vgacore.cmp.hdb
...\..\vgacore.cmp.logdb
...\..\vgacore.cmp.rdb
...\..\vgacore.cmp.tdb
...\..\vgacore.cmp0.ddb
...\..\vgacore.db_info
...\..\vgacore.eco.cdb
...\..\vgacore.fit.qmsg
...\..\vgacore.hier_info
...\..\vgacore.hif
...\..\vgacore.lpc.html
...\..\vgacore.lpc.rdb
...\..\vgacore.lpc.txt
...\..\vgacore.map.cdb
...\..\vgacore.map.hdb
...\..\vgacore.map.logdb
...\..\vgacore.map.qmsg
...\..\vgacore.pre_map.cdb
...\..\vgacore.pre_map.hdb
...\..\vgacore.rtlv.hdb
...\..\vgacore.rtlv_sg.cdb
...\..\vgacore.rtlv_sg_swap.cdb
...\..\vgacore.sgdiff.cdb
...\..\vgacore.sgdiff.hdb
...\..\vgacore.sim.vwf
...\..\vgacore.sld_design_entry.sci
...\..\vgacore.sld_design_entry_dsc.sci
...\..\vgacore.syn_hier_info
...\..\vgacore.tan.qmsg
...\..\vgacore.tis_db_list.ddb
...\..\vgacore.tmw_info
...\db
...\incremental_db\compiled_partitions\vgacore.root_partition.map.kpt
...\..............\compiled_partitions
...\..............\README
...\incremental_db
...\vgacore.asm.rpt
...\vgacore.cdf
...\vgacore.done
...\vgacore.dpf
...\vgacore.fit.eqn
...\vgacore.fit.rpt
...\vgacore.fit.summary
...\vgacore.flow.rpt
...\vgacore.map.eqn
...\vgacore.map.rpt
...\vgacore.map.summary

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