The sine signal generator based on VHDL, experience card

sin发生器\count.bsf
.........\count.cmp
.........\count.inc
.........\count.vhd
.........\count_inst.vhd
.........\count_wave0.jpg
.........\count_waveforms.html
.........\data.bsf
.........\data.cmp
.........\data.inc
.........\data.vhd
.........\data_inst.vhd
.........\data_wave0.jpg
.........\data_waveforms.html
.........\.b\altsyncram_4p82.tdf
.........\..\altsyncram_6p82.tdf
.........\..\altsyncram_8k91.tdf
.........\..\altsyncram_9k91.tdf
.........\..\prev_cmp_sin.map.qmsg
.........\..\prev_cmp_sin.qmsg
.........\..\sin.cbx.xml
.........\..\sin.cmp.rdb
.........\..\sin.db_info
.........\..\sin.eco.cdb
.........\..\sin.hif
.........\..\sin.map.qmsg
.........\..\sin.sld_design_entry.sci
.........\..\sin.sld_design_entry_dsc.sci
.........\..\sin.tis_db_list.ddb
.........\sin.bdf
.........\sin.done
.........\sin.flow.rpt
.........\sin.map.rpt
.........\sin.map.summary
.........\sin.qpf
.........\sin.qsf
.........\sin.qws
.........\sin256.MIF
.........\sin256.MIF.bak
.........\sin_rom.vhd
.........\db
sin发生器

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