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Calendar

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 4.76mb
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  • Author :wtm_****
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Introduction - If you have any usage issues, please Google them yourself
① The EDA training instrument I/O devices and PLD chip digital calendar design. ② Figures calendar can display year, month, day, hours, minutes and seconds. ③ instrument training with EDA eight out of eight two-screen digital display, respectively, year, month, day and hour, minute, second, that a certain period of time shows year, month, day (eg 20080101), then another period of time shows hours, minutes, seconds (eg, 00123625), automatically switching the two time periods. ④ reset and calibrated with a digital calendar year, month, day, hour, minute, second button, but when the school year and school with a button that displays the year, month, day use this button when the school year, when the display , minutes, seconds, use this button to school, and so on.
Packet file list
(Preview for download)
Calendar\cnt24.asm.rpt
........\cnt24.bsf
........\cnt24.done
........\cnt24.fit.rpt
........\cnt24.fit.smsg
........\cnt24.fit.summary
........\cnt24.flow.rpt
........\cnt24.map.rpt
........\cnt24.map.summary
........\cnt24.pin
........\cnt24.pof
........\cnt24.qpf
........\cnt24.qsf
........\cnt24.qws
........\cnt24.sof
........\cnt24.tan.rpt
........\cnt24.tan.summary
........\cnt24.v
........\cnt60.asm.rpt
........\cnt60.bsf
........\cnt60.done
........\cnt60.fit.rpt
........\cnt60.fit.smsg
........\cnt60.fit.summary
........\cnt60.flow.rpt
........\cnt60.map.rpt
........\cnt60.map.summary
........\cnt60.pin
........\cnt60.pof
........\cnt60.qpf
........\cnt60.qsf
........\cnt60.qws
........\cnt60.sof
........\cnt60.tan.rpt
........\cnt60.tan.summary
........\cnt60.v
........\contr.asm.rpt
........\contr.bsf
........\contr.done
........\contr.fit.rpt
........\contr.fit.smsg
........\contr.fit.summary
........\contr.flow.rpt
........\contr.map.rpt
........\contr.map.summary
........\contr.pin
........\contr.pof
........\contr.qpf
........\contr.qsf
........\contr.qws
........\contr.sof
........\contr.tan.rpt
........\contr.tan.summary
........\contr.v
........\contr.v.bak
........\d24.asm.rpt
........\d24.bsf
........\d24.done
........\d24.fit.rpt
........\d24.fit.smsg
........\d24.fit.summary
........\d24.flow.rpt
........\d24.map.rpt
........\d24.map.summary
........\d24.pin
........\d24.pof
........\d24.qpf
........\d24.qsf
........\d24.qws
........\d24.sof
........\d24.tan.rpt
........\d24.tan.summary
........\d24.v
........\d60.asm.rpt
........\d60.bsf
........\d60.done
........\d60.fit.rpt
........\d60.fit.smsg
........\d60.fit.summary
........\d60.flow.rpt
........\d60.map.rpt
........\d60.map.summary
........\d60.pin
........\d60.pof
........\d60.qpf
........\d60.qsf
........\d60.qws
........\d60.sof
........\d60.tan.rpt
........\d60.tan.summary
........\d60.v
........\d60.v.bak
........\.b\add_sub_3dc.tdf
........\..\add_sub_4dc.tdf
........\..\add_sub_5dc.tdf
........\..\add_sub_6dc.tdf
........\..\add_sub_7dc.tdf
........\..\add_sub_8dc.tdf
........\..\add_sub_9dc.tdf
........\..\add_sub_adc.tdf
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