Hot Search : Source embeded web remote control p2p game More...
Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog

FPGA-wireless]

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 300kb
  • Downloaded :0次
  • Author :liuc****
  • About : Nobody
  • PS : If download it fails, try it again. Download again for free!
Download1 Download2
Don't use download software fo downloading.
If download fail,Try it again for free.
Introduction - If you have any usage issues, please Google them yourself
FPGA wirele
Packet file list
(Preview for download)
无线通信FPGA设计[程序源代码]\缩略语表.doc
............................\matlab代码\matlab\c9\convcode.m
............................\..........\......\..\CRCcheck.m
............................\..........\......\..\encoderm.m
............................\..........\......\..\encode_bit.m
............................\..........\......\..\hamming7_4.m
............................\..........\......\..\intrlvcode.m
............................\..........\......\..\RScode.m
............................\..........\......\..\rsc_encode.m
............................\..........\......\..\TCMcode.m
............................\..........\......\.8\ASKmod.m
............................\..........\......\..\F2T.m
............................\..........\......\..\LPF.m
............................\..........\......\..\MSKmod.m
............................\..........\......\..\OFDMmod.m
............................\..........\......\..\QAMmod.m
............................\..........\......\..\QPSKmod.m
............................\..........\......\..\T2F.m
............................\..........\......\.7\cicde.m
............................\..........\......\..\CICdec.m
............................\..........\......\..\cicin.m
............................\..........\......\..\CICinterp.m
............................\..........\......\..\halfdec.m
............................\..........\......\..\halfinterp.m
............................\..........\......\..\hbfil.m
............................\..........\......\..\multirece.m
............................\..........\......\..\multisend.m
............................\..........\......\.6\impinvar_bilinear.m
............................\..........\......\..\rcosflt_filter.m
............................\..........\......\..\rcosine_filter.m
............................\..........\......\.13\cell_search_cpich.m
............................\..........\......\...\ovsf.m
............................\..........\......\...\scramble.m
............................\..........\......\...\wcdmasource.m
............................\..........\......\..2\correce.m
............................\..........\......\...\matchfil.m
............................\..........\......\...\rake.m
............................\..........\......\..1\adpeq.m
............................\..........\......\...\ante.m
............................\..........\......\...\FFTlms.m
............................\..........\......\...\lms.m
............................\..........\......\...\RLS.m
............................\..........\......\...\signlms.m
............................\..........\......\...\WHT.m
............................\..........\......\...\WHTlms.m
............................\..........\......\..0\c.mat
............................\..........\......\...\costas.m
............................\..........\......\...\frame_syn.m
............................\..........\......\...\PLLC.m
............................\..........\......\...\RRCrece.m
............................\..........\......\...\RRCsend.m
............................\..........\......\...\symbol_syn.m
............................\Verilog代码\readme.txt
............................\...........\c9\9-8\rs_enc.v
............................\...........\..\..5\crc_16.v
............................\...........\..\..2\linearcode.v
............................\...........\..\...\lineardecode.v
............................\...........\..\..16\tcm_enc.v
............................\...........\..\...3\block_ram.xco
............................\...........\..\....\interleaver.v
............................\...........\..\...1\viterbi.v
............................\...........\..\...0\conv_enc.v
............................\...........\.8\8-9\fsk_two.v
............................\...........\..\..8\two_fsk.v
............................\...........\..\..6\QPSK_two.v
............................\...........\..\..5\QPSK.v
............................\...........\..\..3\ASK_two.v
............................\...........\..\..2\two_ASK.v
...................
Related instructions
  • We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
  • The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
  • Please use Winrar for decompression tools
  • If download fail, Try it againg or Feedback to us.
  • If downloaded content did not match the introduction, Feedback to us,Confirm and will be refund.
  • Before downloading, you can inquire through the uploaded person information

Nothing.

Post Comment
*Quick comment Recommend Not bad Password Unclear description Not source
Lost files Unable to decompress Bad
*Content :
*Captcha :
CodeBus is one of the largest source code repositories on the Internet!
Contact us :
1999-2046 CodeBus All Rights Reserved.