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VerilogPHDL

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 11.54mb
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Introduction - If you have any usage issues, please Google them yourself
Verilog+ HDL programming examples Detailed 10-13.rar, is a good material for language learning velilog
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(Preview for download)
Verilog+HDL程序设计实例详解10-13\Chapter-10\Chapter-10\10.2\chart\Thumbs.db
................................\..........\..........\....\.....\图10-12.bmp
................................\..........\..........\....\.....\图10-7.bmp
................................\..........\..........\....\.....\图10-8.bmp
................................\..........\..........\....\.....\图10-9.bmp
................................\..........\..........\....\csc.cr.mti
................................\..........\..........\....\csc.mpf
................................\..........\..........\....\csc_testbench.v
................................\..........\..........\....\rgb2ycrcb.v
................................\..........\..........\....\transcript
................................\..........\..........\....\vsim.wlf
................................\..........\..........\....\wave\csc_testbench.bmp
................................\..........\..........\....\....\rgb2ycrcb.bmp
................................\..........\..........\....\....\Thumbs.db
................................\..........\..........\....\.ork\csc_testbench\verilog.asm
................................\..........\..........\....\....\.............\_primary.dat
................................\..........\..........\....\....\.............\_primary.vhd
................................\..........\..........\....\....\rgb2ycrcb\verilog.asm
................................\..........\..........\....\....\.........\_primary.dat
................................\..........\..........\....\....\.........\_primary.vhd
................................\..........\..........\....\....\_info
................................\..........\..........\...3\chart\Thumbs.db
................................\..........\..........\....\.....\图10-18.bmp
................................\..........\..........\....\.....\图10-19.bmp
................................\..........\..........\....\.....\图10-20.bmp
................................\..........\..........\....\.....\图10-22.bmp
................................\..........\..........\....\.....\图10-23.bmp
................................\..........\..........\....\.....\图10-25.bmp
................................\..........\..........\....\.....\图10-28.bmp
................................\..........\..........\....\.....\表10-3.bmp
................................\..........\..........\....\dct.cr.mti
................................\..........\..........\....\dct.mpf
................................\..........\..........\....\dct.v
................................\..........\..........\....\dctu.v
................................\..........\..........\....\dctub.v
................................\..........\..........\....\dct_cos_table.v
................................\..........\..........\....\dct_mac.v
................................\..........\..........\....\dct_syn.v
................................\..........\..........\....\dct_testbench.v
................................\..........\..........\....\fdct.v
................................\..........\..........\....\qnr.cr.mti
................................\..........\..........\....\timescale.v
................................\..........\..........\....\transcript
................................\..........\..........\....\vsim.wlf
................................\..........\..........\....\wave\dct.bmp
................................\..........\..........\....\....\dctu.bmp
................................\..........\..........\....\....\dctub.bmp
................................\..........\..........\....\....\dct_testbench.bmp
................................\..........\..........\....\....\fdct.bmp
................................\..........\..........\....\....\Thumbs.db
................................\..........\..........\....\....\zigzag.bmp
................................\..........\..........\....\.ork\bench_top\verilog.asm
................................\..........\..........\....\....\.........\_primary.dat
................................\..........\........
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