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h_adder_hdl

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 218kb
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  • Author :喻***
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Introduction - If you have any usage issues, please Google them yourself
Written by HDL half adder, has passed my simulation, are very helpful for beginners.
Packet file list
(Preview for download)
h_adder_hdl\h_adder.asm.rpt
...........\h_adder.done
...........\h_adder.fit.rpt
...........\h_adder.fit.summary
...........\h_adder.flow.rpt
...........\h_adder.map.rpt
...........\h_adder.map.summary
...........\h_adder.pin
...........\h_adder.pof
...........\h_adder.qpf
...........\h_adder.qsf
...........\h_adder.qws
...........\h_adder.sim.rpt
...........\h_adder.tan.rpt
...........\h_adder.tan.summary
...........\h_adder.v
...........\h_adder.v.bak
...........\h_adder.vwf
...........\myFIFO.bsf
...........\myFIFO.qip
...........\myFIFO.v
...........\myFIFO_bb.v
...........\myFIFO_wave0.jpg
...........\myFIFO_wave1.jpg
...........\myFIFO_waveforms.html
...........\incremental_db\README
...........\..............\compiled_partitions\h_adder.root_partition.map.kpt
...........\db\h_adder.asm.qmsg
...........\..\h_adder.asm.rdb
...........\..\h_adder.cbx.xml
...........\..\h_adder.cmp.cdb
...........\..\h_adder.cmp.hdb
...........\..\h_adder.cmp.logdb
...........\..\h_adder.cmp.rdb
...........\..\h_adder.cmp.tdb
...........\..\h_adder.cmp0.ddb
...........\..\h_adder.db_info
...........\..\h_adder.eco.cdb
...........\..\h_adder.eds_overflow
...........\..\h_adder.fit.qmsg
...........\..\h_adder.fnsim.cdb
...........\..\h_adder.fnsim.hdb
...........\..\h_adder.fnsim.qmsg
...........\..\h_adder.hier_info
...........\..\h_adder.hif
...........\..\h_adder.lpc.html
...........\..\h_adder.lpc.rdb
...........\..\h_adder.lpc.txt
...........\..\h_adder.map.cdb
...........\..\h_adder.map.hdb
...........\..\h_adder.map.logdb
...........\..\h_adder.map.qmsg
...........\..\h_adder.pre_map.cdb
...........\..\h_adder.pre_map.hdb
...........\..\h_adder.rpp.qmsg
...........\..\h_adder.rtlv.hdb
...........\..\h_adder.rtlv_sg.cdb
...........\..\h_adder.rtlv_sg_swap.cdb
...........\..\h_adder.sgate.rvd
...........\..\h_adder.sgate_sm.rvd
...........\..\h_adder.sgdiff.cdb
...........\..\h_adder.sgdiff.hdb
...........\..\h_adder.sim.cvwf
...........\..\h_adder.sim.hdb
...........\..\h_adder.sim.qmsg
...........\..\h_adder.sim.rdb
...........\..\h_adder.simfam
...........\..\h_adder.sld_design_entry.sci
...........\..\h_adder.sld_design_entry_dsc.sci
...........\..\h_adder.smart_action.txt
...........\..\h_adder.syn_hier_info
...........\..\h_adder.tan.qmsg
...........\..\h_adder.tis_db_list.ddb
...........\..\logic_util_heursitic.dat
...........\..\prev_cmp_h_adder.asm.qmsg
...........\..\prev_cmp_h_adder.fit.qmsg
...........\..\prev_cmp_h_adder.map.qmsg
...........\..\prev_cmp_h_adder.qmsg
...........\..\prev_cmp_h_adder.tan.qmsg
...........\..\wed.wsf
...........\incremental_db\compiled_partitions
...........\incremental_db
...........\db
h_adder_hdl
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