Development board supporting the many tutorial easy experiments start from the beginner with the language VHDL and verilog HDL

Filename	Size	Update
EPM240（VHDL	VERILOG）chengxu\17_ADC0804moshu\adc0804_v\adc.asm.rpt
.............................\...............\.........\adc.cdf
.............................\...............\.........\adc.done
.............................\...............\.........\adc.dpf
.............................\...............\.........\adc.fit.rpt
.............................\...............\.........\adc.fit.smsg
.............................\...............\.........\adc.fit.summary
.............................\...............\.........\adc.flow.rpt
.............................\...............\.........\adc.map.rpt
.............................\...............\.........\adc.map.smsg
.............................\...............\.........\adc.map.summary
.............................\...............\.........\adc.pin
.............................\...............\.........\adc.pof
.............................\...............\.........\adc.qpf
.............................\...............\.........\adc.qsf
.............................\...............\.........\adc.qws
.............................\...............\.........\adc.tan.rpt
.............................\...............\.........\adc.tan.summary
.............................\...............\.........\adc.v
.............................\...............\.........\adc.v.bak
.............................\...............\.........\db\adc.asm.qmsg
.............................\...............\.........\..\adc.asm_labs.ddb
.............................\...............\.........\..\adc.cbx.xml
.............................\...............\.........\..\adc.cmp.cdb
.............................\...............\.........\..\adc.cmp.hdb
.............................\...............\.........\..\adc.cmp.logdb
.............................\...............\.........\..\adc.cmp.rdb
.............................\...............\.........\..\adc.cmp.tdb
.............................\...............\.........\..\adc.cmp0.ddb
.............................\...............\.........\..\adc.dbp
.............................\...............\.........\..\adc.db_info
.............................\...............\.........\..\adc.eco.cdb
.............................\...............\.........\..\adc.fit.qmsg
.............................\...............\.........\..\adc.hier_info
.............................\...............\.........\..\adc.hif
.............................\...............\.........\..\adc.map.cdb
.............................\...............\.........\..\adc.map.hdb
.............................\...............\.........\..\adc.map.logdb
.............................\...............\.........\..\adc.map.qmsg
.............................\...............\.........\..\adc.pre_map.cdb
.............................\...............\.........\..\adc.pre_map.hdb
.............................\...............\.........\..\adc.psp
.............................\...............\.........\..\adc.pss
.............................\...............\.........\..\adc.rtlv.hdb
.............................\...............\.........\..\adc.rtlv_sg.cdb
.............................\...............\.........\..\adc.rtlv_sg_swap.cdb
.............................\...............\.........\..\adc.sgdiff.cdb
.............................\...............\.........\..\adc.sgdiff.hdb
.............................\...............\.........\..\adc.signalprobe.cdb
.............................\...............\.........\..\adc.sld_design_entry.sci
.............................\...............\.........\..\adc.sld_design_entry_dsc.sci
.............................\...............\.........\..\adc.syn_hier_info
.............................\...............\.........\..\adc.tan.qmsg
.............................\...............\.........\..\adc.tis_db_list.ddb
.............................\...............\.........\..\add_sub_09c.tdf
.............................\...............\.........\..\add_sub_0ah.tdf
.............................\...............\.........\..\add_sub_19c.tdf
.............................\...........

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