verilog tutorials inside many a verilog tutorial learning, development board comes with some, and some is my own collated, it is practical, but also for FPGA enthusiasts, very good.

Verilog HDL资料\CummingsSNUG2001SJ_AsyncClk_rev1_1.pdf
...............\Design_Reuse_Methodology.pdf
...............\FPGA CPLD数字电路设计经验分享.pdf
...............\FPGA设计的四种常用思想与技巧.pdf
...............\HDL编码风格与编码指南.htm
...............\Introduction to Verilog.pdf
...............\LeonardoSpectrum HDL Synthesis.pdf
...............\ModelSim作布局布线后仿真的库问题.pdf
...............\ModelSim简明操作指南.pdf
...............\QuartusII中文简明使用手册.pdf
...............\Quick Reference for verilog HDL.pdf
...............\SignalTap Embedded Logic Analyzer Megafunction.pdf
...............\VHDL语言的层次化设计.ppt
...............\Verilog基础知识.pdf
...............\Verilog编码与综合中的非阻塞性赋值.pdf
...............\Verilog设计练习进阶.pdf
...............\Writing Testbenches.pdf
...............\actel_HDL_coding_style_guide.pdf
...............\fpga_timing.pdf
...............\synplicity.PDF
...............\优秀设计的十大戒律.pdf
...............\卡内基梅陇大学The Verilog Hardware Description Language课程讲义.pdf
...............\同步复位与异步复位.pdf
...............\.踅鹈鳌禫erilog HDL程序设计教程》代码\examples.pdf
...............\.....................................\chap9\bidir.v
...............\.....................................\.....\bidir2.v
...............\.....................................\.....\code_83.v
...............\.....................................\.....\decode47.v
...............\.....................................\.....\decoder_38.v
...............\.....................................\.....\dff.v
...............\.....................................\.....\dff1.v
...............\.....................................\.....\dff2.v
...............\.....................................\.....\encoder8_3.v
...............\.....................................\.....\gate1.v
...............\.....................................\.....\gate2.v
...............\.....................................\.....\gate3.v
...............\.....................................\.....\jk_ff.v
...............\.....................................\.....\johnson.v
...............\.....................................\.....\latch_1.v
...............\.....................................\.....\latch_2.v
...............\.....................................\.....\latch_8.v
...............\.....................................\.....\mac.v
...............\.....................................\.....\mac_tp.v
...............\.....................................\.....\map_lpm_ram.v
...............\.....................................\.....\mpc.v
...............\.....................................\.....\mpc_tp.v
...............\.....................................\.....\mux_case.v
...............\.....................................\.....\mux_if.v
...............\.....................................\.....\parity.v
...............\.....................................\.....\ram256x8.v
...............\.....................................\.....\reg8.v
...............\.....................................\.....\rom.v
...............\.....................................\.....\serial_pal.v
...............\.....................................\.....\shifter.v
...............\.....................................\.....\tri_1.v
...............\.....................................\.....\tri_2.v
...............\.....................................\.....\updown_count.v
...............\.....................................\....8\add8_tp.v
...............\.....................................\.....\carry_udp.v
...............\.....................................\.....\carry_udpx1.v
...............\.....................................\.....\carry_udpx2.v
...............\.....................................\.....\count8_tp.v
...............\.....................................\.....\delay.v
...............\.....................................\.....\dff.v
...............\.....................................\.....\dff_udp.v
...............\.....................................\.....\latch.v
...............\............

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