16-bit mod-7 divider.

verilogfile\状态机版\2\area_report.rpt
...........\........\.\dc.log
...........\........\.\Screenshot-1.png
...........\........\.\Screenshot-2.png
...........\........\.\Screenshot-3.png
...........\........\.\Screenshot-4.png
...........\........\.\Screenshot-5.png
...........\........\.\Screenshot.png
...........\........\.\smic18.v
...........\........\.\stmac2.v
...........\........\.\stmac2.v~
...........\........\.\stmac2_net.v
...........\........\.\tb2.v
...........\........\.\tb2.v~
...........\........\.\timing_report.rpt
...........\........\.\transcript
...........\非状态机版\1\area_report.rpt
...........\..........\.\dc.log
...........\..........\.\Screenshot-1.png
...........\..........\.\Screenshot-10.png
...........\..........\.\Screenshot-2.png
...........\..........\.\Screenshot-3.png
...........\..........\.\Screenshot-4.png
...........\..........\.\Screenshot-5.png
...........\..........\.\Screenshot-6.png
...........\..........\.\Screenshot-7.png
...........\..........\.\Screenshot-8.png
...........\..........\.\Screenshot-9.png
...........\..........\.\Screenshot.png
...........\..........\.\stmac.v
...........\..........\.\stmac_net.v
...........\..........\.\tb.v
...........\..........\.\timing_report.rpt
...........\..........\.\transcript
...........\状态机版\2
...........\非状态机版\1
...........\状态机版
...........\非状态机版
verilogfile

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