FPGA 上的嵌入式系统设计实例，SPARTEN-3E-FPGA, embedded system design example, SPARTEN-3E

全数字调制解调器设计实例\MATLAB程序\AGC.M
........................\..........\AGCTBL.M
........................\..........\AGCVEC.M
........................\..........\PLL.M
........................\..........\PLL.M.BAK
........................\..........\PLLSIM.M
........................\..........\RRC_H.M
........................\..........\RRC_ROM.M
........................\QUARTUS程序\AGC\AGC.DONE
........................\...........\...\AGC.FLOW.RPT
........................\...........\...\AGC.MAP.EQN
........................\...........\...\AGC.MAP.RPT
........................\...........\...\AGC.QPF
........................\...........\...\AGC.QSF
........................\...........\...\AGC.QWS
........................\...........\...\AGC.SIM.RPT
........................\...........\...\AGC.TBL
........................\...........\...\AGC.TDF
........................\...........\...\AGC_ASSIGNMENT_DEFAULTS.QDF
........................\...........\...\CMP_STATE.INI
........................\...........\...\DB\ADD_SUB_4SG.TDF
........................\...........\...\..\ADD_SUB_BSG.TDF
........................\...........\...\..\ADD_SUB_DVB.TDF
........................\...........\...\..\ADD_SUB_EOF.TDF
........................\...........\...\..\ADD_SUB_FOF.TDF
........................\...........\...\..\ADD_SUB_GKF.TDF
........................\...........\...\..\ADD_SUB_HHG.TDF
........................\...........\...\..\ADD_SUB_HKF.TDF
........................\...........\...\..\ADD_SUB_LGH.TDF
........................\...........\...\..\ADD_SUB_N3H.TDF
........................\...........\...\..\ADD_SUB_O3H.TDF
........................\...........\...\..\ADD_SUB_OVG.TDF
........................\...........\...\..\ADD_SUB_PQF.TDF
........................\...........\...\..\AGC-SIM.VWF
........................\...........\...\..\AGC.DB_INFO
........................\...........\...\..\AGC.ECO.CDB
........................\...........\...\..\AGC.SLD_DESIGN_ENTRY.SCI
........................\...........\...\..\AGC_CMP.QRPT
........................\...........\...\..\AGC_HIER_INFO
........................\...........\...\..\AGC_SIM.QRPT
........................\...........\...\..\AGC_SYN_HIER_INFO
........................\...........\...\..\CMPR_0H8.TDF
........................\...........\...\..\CMPR_2D8.TDF
........................\...........\...\..\CMPR_33B.TDF
........................\...........\...\..\CMPR_5VA.TDF
........................\...........\...\..\CMPR_83B.TDF
........................\...........\...\..\CMPR_AVA.TDF
........................\...........\...\..\PAR_ADD_BLA.TDF
........................\...........\...\..\PAR_ADD_DHA.TDF
........................\...........\...\SIM.CFG
........................\...........\...\VECTOR.VEC
........................\...........\CRBLOCK.TDF
........................\...........\RRC.MIF
........................\...........\RRC.TBL
........................\...........\RRC.TDF
........................\...........\STR.BDF
........................\...........\STR_FILTER.TDF
........................\...........\AGC\DB
........................\...........\AGC
........................\MATLAB程序
........................\QUARTUS程序
全数字调制解调器设计实例

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