CPU program written in VHDL, with the micro-program ways.Containing the document of the program.

CPU-exp
.......\CPU-exp
.......\.......\ACC.bsf
.......\.......\ACC.vhd
.......\.......\ALU.bsf
.......\.......\ALU.vhd
.......\.......\ALU.vwf
.......\.......\CAR.bsf
.......\.......\CAR.vhd
.......\.......\CAR.vwf
.......\.......\cmp_state.ini
.......\.......\control_memory.mif
.......\.......\CPU.asm.rpt
.......\.......\CPU.bdf
.......\.......\CPU.done
.......\.......\CPU.fit.eqn
.......\.......\CPU.fit.rpt
.......\.......\CPU.fit.summary
.......\.......\CPU.fld
.......\.......\CPU.flow.rpt
.......\.......\CPU.map.eqn
.......\.......\CPU.map.rpt
.......\.......\CPU.map.summary
.......\.......\CPU.pin
.......\.......\CPU.pof
.......\.......\CPU.qpf
.......\.......\CPU.qsf
.......\.......\CPU.qws
.......\.......\CPU.sim.rpt
.......\.......\CPU.sof
.......\.......\CPU.tan.rpt
.......\.......\CPU.tan.summary
.......\.......\CPU.vwf
.......\.......\db
.......\.......\..\add_sub_0qh.tdf
.......\.......\..\add_sub_1qh.tdf
.......\.......\..\add_sub_4sh.tdf
.......\.......\..\add_sub_5sh.tdf
.......\.......\..\altsyncram_1jr.tdf
.......\.......\..\altsyncram_6mj.tdf
.......\.......\..\altsyncram_8v31.tdf
.......\.......\..\altsyncram_bmj.tdf
.......\.......\..\altsyncram_csq.tdf
.......\.......\..\altsyncram_h1q.tdf
.......\.......\..\altsyncram_j831.tdf
.......\.......\..\altsyncram_k2k.tdf
.......\.......\..\CPU.asm.qmsg
.......\.......\..\CPU.cbx.xml
.......\.......\..\CPU.cmp.cdb
.......\.......\..\CPU.cmp.hdb
.......\.......\..\CPU.cmp.logdb
.......\.......\..\CPU.cmp.rdb
.......\.......\..\CPU.cmp.tdb
.......\.......\..\CPU.cmp0.ddb
.......\.......\..\CPU.db_info
.......\.......\..\CPU.eco.cdb
.......\.......\..\CPU.eds_overflow
.......\.......\..\CPU.fit.qmsg
.......\.......\..\CPU.fnsim.cdb
.......\.......\..\CPU.fnsim.hdb
.......\.......\..\CPU.hier_info
.......\.......\..\CPU.hif
.......\.......\..\CPU.map.cdb
.......\.......\..\CPU.map.hdb
.......\.......\..\CPU.map.logdb
.......\.......\..\CPU.map.qmsg
.......\.......\..\CPU.pre_map.cdb
.......\.......\..\CPU.pre_map.hdb
.......\.......\..\CPU.psp
.......\.......\..\CPU.rtlv.hdb
.......\.......\..\CPU.rtlv_sg.cdb
.......\.......\..\CPU.rtlv_sg_swap.cdb
.......\.......\..\CPU.sgdiff.cdb
.......\.......\..\CPU.sgdiff.hdb
.......\.......\..\CPU.signalprobe.cdb
.......\.......\..\CPU.sim.hdb
.......\.......\..\CPU.sim.qmsg
.......\.......\..\CPU.sim.rdb
.......\.......\..\CPU.sim.vwf
.......\.......\..\CPU.sld_design_entry.sci
.......\.......\..\CPU.sld_design_entry_dsc.sci
.......\.......\..\CPU.syn_hier_info
.......\.......\..\CPU.tan.qmsg
.......\.......\..\CPU0.rtl.mif
.......\.......\..\CPU_cmp.qrpt
.......\.......\..\CPU_sim.qrpt
.......\.......\..\decoder0.rtl.mif
.......\.......\..\mult_ko01.tdf
.......\.......\..\mult_n3o.tdf
.......\.......\..\mult_qao.tdf
.......\.......\..\mux_5fc.tdf
.......\.......\..\mux_ldc.tdf
.......\.......\decoder.bsf
.......\.......\decoder.vhd
.......\.......\decoder.vwf
.......\.......\IR.bsf
.......\.......\IR.vhd
.......\.......\lpm_ram_dq0.bsf
.......\.......\lpm_ram_dq0.cmp
.......\.......\lpm_ram_dq0.vhd

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