VHDL Lab 3 – Arithmetic & State Machines In this lab we will look at arithmetic circuits that add, subtract, and multiply numbers. Each type of circuit will be implemented in two ways: first by writing VHDL code that describes the required functionality, and second by making use of predefined subcircuits from Altera’s library of parameterized modules (LPMs). The results produced for various implementations will be compared, both in terms of the circuit structure and its speed of operation. In the final part of this lab, we introduce the requirement for a Test Bench.

lab3\addsub.cmp
....\addsub.qip
....\addsub.vhd
....\addsub_wave0.jpg
....\addsub_wave1.jpg
....\addsub_waveforms.html
....\FSM_testbench.vhd
....\lab3_1.done
....\lab3_1.fit.smsg
....\lab3_1.fit.summary
....\lab3_1.map.summary
....\lab3_1.pin
....\lab3_1.pof
....\lab3_1.qpf
....\lab3_1.qsf
....\lab3_1.sim.rpt
....\lab3_1.sof
....\lab3_1.tan.summary
....\lab3_1.vhd
....\lab3_1.vwf
....\lab3_2.done
....\lab3_2.fit.smsg
....\lab3_2.fit.summary
....\lab3_2.map.summary
....\lab3_2.pin
....\lab3_2.pof
....\lab3_2.qpf
....\lab3_2.qsf
....\lab3_2.sof
....\lab3_2.tan.summary
....\lab3_2.vhd
....\lab3_3.asm.rpt
....\lab3_3.done
....\lab3_3.fit.rpt
....\lab3_3.fit.smsg
....\lab3_3.fit.summary
....\lab3_3.map.summary
....\lab3_3.pin
....\lab3_3.pof
....\lab3_3.qpf
....\lab3_3.qsf
....\lab3_3.sof
....\lab3_3.tan.rpt
....\lab3_3.tan.summary
....\lab3_3.vhd
....\lpm_add8.cmp
....\lpm_add8.qip
....\lpm_add8.v
....\lpm_add8_bb.v
....\lpm_add8_wave0.jpg
....\lpm_add8_wave1.jpg
....\lpm_add8_waveforms.html
....\db\add_sub_laj.tdf
....\..\lab3_1.asm.rdb
....\..\lab3_1.asm_labs.ddb
....\..\lab3_1.cmp.bpm
....\..\lab3_1.cmp.ecobp
....\..\lab3_1.tis_db_list.ddb
....\..\lab3_1.asm.qmsg
....\..\lab3_1.tan.qmsg
....\..\lab3_2.db_info
....\..\lab3_1.cmp.tdb
....\..\lab3_1.eco.cdb
....\..\lab3_1.cmp.rdb
....\..\lab3_2.tmw_info
....\..\lab3_1.cmp0.ddb
....\..\lab3_1.cmp.cdb
....\..\lab3_1.cmp.hdb
....\..\lab3_2.map.qmsg
....\..\lab3_3.hif
....\..\lab3_1.sld_design_entry.sci
....\..\lab3_2.cmp.cdb
....\..\lab3_2.asm.qmsg
....\..\lab3_2.cbx.xml
....\..\lab3_2.hier_info
....\..\lab3_2.rtlv_sg_swap.cdb
....\..\lab3_2.smart_action.txt
....\..\lab3_2.lpc.txt
....\..\lab3_2.lpc.html
....\..\lab3_2.lpc.rdb
....\..\lab3_2.pre_map.hdb
....\..\lab3_2.pre_map.cdb
....\..\lab3_2.map_bb.logdb
....\..\lab3_2.sgdiff.cdb
....\..\lab3_2.sgdiff.hdb
....\..\lab3_2.fit.qmsg
....\..\lab3_2.cmp.logdb
....\..\lab3_2.tan.qmsg
....\..\lab3_2.syn_hier_info
....\..\lab3_2.cmp2.ddb
....\..\lab3_2.rtlv_sg.cdb
....\..\lab3_2.map.ecobp
....\..\lab3_2.rtlv.hdb
....\..\lab3_2.map.kpt
....\..\lab3_2.cmp_merge.kpt
....\..\lab3_2.cmp.tdb
....\..\lab3_1.sim.cvwf
....\..\lab3_2.map_bb.cdb
....\..\prev_cmp_lab3_2.map.qmsg
....\..\lab3_2.map.cdb

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