Actel fusion M1AFS600 the LCD test, Zhou, who based the company CortexM1 development board, the program includes FPGA source code and Keil C language programming environment, the program test.

LCD\keil\LCD1602\config.h
...\....\.......\define.h
...\....\.......\ExtDll.iex
...\....\.......\LCD1602.axf
...\....\.......\LCD1602.c
...\....\.......\lcd1602.crf
...\....\.......\lcd1602.d
...\....\.......\LCD1602.h
...\....\.......\LCD1602.htm
...\....\.......\LCD1602.lnp
...\....\.......\LCD1602.map
...\....\.......\lcd1602.o
...\....\.......\LCD1602.opt.bak
...\....\.......\LCD1602.plg
...\....\.......\LCD1602.sct
...\....\.......\LCD1602.tra
...\....\.......\LCD1602.Uv2.bak
...\....\.......\LCD1602.uvopt
...\....\.......\LCD1602.uvproj
...\....\.......\LCD1602_Opt.Bak
...\....\.......\LCD1602_sct.Bak
...\....\.......\LCD1602_Target 1.dep
...\....\.......\LCD1602_Uv2.Bak
...\....\.......\LCD1602_uvopt.bak
...\....\.......\lcd_1602.crf
...\....\.......\lcd_1602.d
...\....\.......\lcd_1602.o
...\....\.......\lcd_define.crf
...\....\.......\lcd_define.d
...\....\.......\lcd_define.o
...\....\.......\main.c
...\....\.......\main.crf
...\....\.......\main.d
...\....\.......\main.o
...\....\.......\photo.crf
...\....\.......\photo.d
...\....\.......\photo.o
...\....\.......\regmap.h
...\....\.......\Startup.lst
...\....\.......\Startup.o
...\....\.......\Startup.s
...\....\.......\TKScope.cfg
...\Libero\LCD1602\component\work\n\n.cxf
...\......\.......\.........\....\.\n.sdb
...\......\.......\..nstraint\CortexM1_top.pdc
...\......\.......\..reconsole\common\CoreAHB2APB\CoreAHB2APB.cxf
...\......\.......\...........\......\...........\rtl\verilog\o\CoreAHB2APB.v
...\......\.......\...........\......\.......Lite\CoreAHBLite.cxf
...\......\.......\...........\......\...........\coreparameters.v
...\......\.......\...........\......\...........\rtl\verilog\o\CoreAHBLite.v
...\......\.......\...........\......\...........\...\.......\.\Decoder.v
...\......\.......\...........\......\...........\...\.......\.\DefaultSlave.v
...\......\.......\...........\......\...........\...\.......\.\MuxS2M.v
...\......\.......\...........\......\.....PB\CoreAPB.cxf
...\......\.......\...........\......\.......\coreparameters.v
...\......\.......\...........\......\.......\rtl\verilog\o\CoreAPB.v
...\......\.......\...........\......\.......\...\.......\.\MuxP2B.v
...\......\.......\...........\......\....GPIO\bfm\CoreGPIO_scriptlet.bfm
...\......\.......\...........\......\........\CoreGPIO.cxf
...\......\.......\...........\......\........\coreparameters.v
...\......\.......\...........\......\........\rtl\verilog\o\CoreGPIO.v
...\......\.......\...........\......\....MemCtrl\bfm\CoreMemCtrl_scriptlet.bfm
...\......\.......\...........\......\...........\CoreMemCtrl.cxf
...\......\.......\...........\......\...........\coreparameters.v
...\......\.......\...........\......\...........\rtl\verilog\o\CoreMemCtrl.v
...\......\.......\...........\......\....Remap\bfm\CoreRemap_scriptlet.bfm
...\......\.......\...........\......\.........\CoreRemap.cxf
...\......\.......\...........\......\.........\rtl\verilog\o\CoreRemap.v
...\......\.......\...........\......\...texM1Top\bfm\subsystem.bfm
...\......\.......\...........\......\...........\coreparameters.v
...\......\.......\...........\......\...........\CortexM1Integration\bfm\compiler\bfmCompile.tcl
...\......\.......\...........\......\...........\...................\...\rtl\verilog\o\AhbLiteBridge.v
...\......\.......\...........\......\...........\...................\...\...\.......\.\CortexM1BFM.v
...\......\.......\...........\......\...........\...................\...\...\.......\u\CortexM1Integration_TS.v
...\......\.......\...........\......\...........\...................\...\subsystem.bfm
...\......\.......\...........\......\...........\...................\M1AFS600-2\0ki_0kd_1int_sm_debug\layout\arm_designer.cdb
...\......\.......\...........\......\...........\...................\..........\.....................\timingshell\verilog\arm_precision.v
...\......\.......\...........\......\...........\...................\..........\.....................\...........\.......\arm_synplify.v
...\......\.......\...........\......\...........\CortexM1Top.cxf
...\......\.......\..........

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