The program is written in a flowing light VHDL program, although simple, but certainly very helpful for beginners.

liushuideng\lsd.qpf
...........\lsd.qsf
...........\db\prev_cmp_lsd.qmsg
...........\..\lsd.cmp.rdb
...........\..\lsd.asm.rdb
...........\..\lsd.db_info
...........\..\lsd.tan.qmsg
...........\..\lsd.sld_design_entry.sci
...........\..\lsd.map.qmsg
...........\..\lsd.fit.qmsg
...........\..\lsd.rtlv.hdb
...........\..\lsd.lpc.txt
...........\..\lsd.lpc.html
...........\..\logic_util_heursitic.dat
...........\..\lsd.lpc.rdb
...........\..\lsd.rtlv_sg_swap.cdb
...........\..\lsd.cbx.xml
...........\..\lsd.pre_map.cdb
...........\..\lsd.smart_action.txt
...........\..\lsd.rtlv_sg.cdb
...........\..\lsd.asm.qmsg
...........\..\lsd.pre_map.hdb
...........\..\lsd.sgdiff.cdb
...........\..\lsd.sgdiff.hdb
...........\..\lsd.sld_design_entry_dsc.sci
...........\..\lsd.map.cdb
...........\..\lsd.asm_labs.ddb
...........\..\lsd.amm.cdb
...........\..\lsd.tmw_info
...........\..\lsd.cmp.tdb
...........\..\lsd.map.hdb
...........\..\lsd.tis_db_list.ddb
...........\..\lsd.cmp.cdb
...........\..\lsd.cmp.hdb
...........\..\lsd.idb.cdb
...........\..\lsd.cmp0.ddb
...........\..\lsd.hif
...........\..\lsd.hier_info
...........\..\lsd.syn_hier_info
...........\..\lsd.cmp.kpt
...........\1hz.vhd.bak
...........\lsd.map.summary
...........\clk_1hz.vhd.bak
...........\clk.vhd
...........\clk.vhd.bak
...........\lsd.vhd
...........\lsd.vhd.bak
...........\incremental_db\compiled_partitions\lsd.db_info
...........\..............\...................\lsd.root_partition.map.kpt
...........\..............\README
...........\lsd.pin
...........\lsd.fit.smsg
...........\lsd.fit.summary
...........\lsd.pof
...........\lsd.tan.summary
...........\lsd.done
...........\lsd.dpf
...........\lsd.cdf
...........\lsd.map.rpt
...........\lsd.fit.rpt
...........\lsd.asm.rpt
...........\lsd.tan.rpt
...........\lsd.flow.rpt
...........\incremental_db\compiled_partitions
...........\db
...........\incremental_db
liushuideng

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