Serial transceivers with Verilog program, prepared by adjusting parameters, you can set/change the baud rate, send and receive data length, is debugging.

rt\baudrate_select.v
..\db\prev_cmp_rt.asm.qmsg
..\..\prev_cmp_rt.fit.qmsg
..\..\prev_cmp_rt.map.qmsg
..\..\prev_cmp_rt.qmsg
..\..\prev_cmp_rt.tan.qmsg
..\..\rt.asm.qmsg
..\..\rt.cbx.xml
..\..\rt.cmp.bpm
..\..\rt.cmp.cdb
..\..\rt.cmp.ecobp
..\..\rt.cmp.hdb
..\..\rt.cmp.kpt
..\..\rt.cmp.logdb
..\..\rt.cmp.rdb
..\..\rt.cmp.tdb
..\..\rt.cmp0.ddb
..\..\rt.cmp_merge.kpt
..\..\rt.db_info
..\..\rt.eco.cdb
..\..\rt.fit.qmsg
..\..\rt.hier_info
..\..\rt.hif
..\..\rt.map.bpm
..\..\rt.map.cdb
..\..\rt.map.ecobp
..\..\rt.map.hdb
..\..\rt.map.kpt
..\..\rt.map.logdb
..\..\rt.map.qmsg
..\..\rt.map_bb.cdb
..\..\rt.map_bb.hdb
..\..\rt.map_bb.hdbx
..\..\rt.map_bb.logdb
..\..\rt.pre_map.cdb
..\..\rt.pre_map.hdb
..\..\rt.psp
..\..\rt.rtlv.hdb
..\..\rt.rtlv_sg.cdb
..\..\rt.rtlv_sg_swap.cdb
..\..\rt.sgdiff.cdb
..\..\rt.sgdiff.hdb
..\..\rt.sld_design_entry.sci
..\..\rt.sld_design_entry_dsc.sci
..\..\rt.smp_dump.txt
..\..\rt.syn_hier_info
..\..\rt.tan.qmsg
..\..\rt.tis_db_list.ddb
..\..\rt.tmw_info
..\incremental_db\compiled_partitions\rt.root_partition.cmp.atm
..\..............\...................\rt.root_partition.cmp.dfp
..\..............\...................\rt.root_partition.cmp.hdbx
..\..............\...................\rt.root_partition.cmp.kpt
..\..............\...................\rt.root_partition.cmp.logdb
..\..............\...................\rt.root_partition.cmp.rcf
..\..............\...................\rt.root_partition.map.atm
..\..............\...................\rt.root_partition.map.dpi
..\..............\...................\rt.root_partition.map.hdbx
..\..............\...................\rt.root_partition.map.kpt
..\..............\README
..\rt.asm.rpt
..\rt.cdf
..\rt.done
..\rt.fit.rpt
..\rt.fit.smsg
..\rt.fit.summary
..\rt.flow.rpt
..\rt.map.rpt
..\rt.map.smsg
..\rt.map.summary
..\rt.pin
..\rt.pof
..\rt.qpf
..\rt.qsf
..\rt.qws
..\rt.sof
..\rt.tan.rpt
..\rt.tan.summary
..\rt.v
..\rt.v.bak
..\uart_rx.v
..\uart_rx.v.bak
..\uart_tx.v
..\uart_tx.v.bak
..\incremental_db\compiled_partitions
..\db
..\incremental_db
rt

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