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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 397kb
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  • Author :a*****
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Introduction - If you have any usage issues, please Google them yourself
Simple lift procedure, can achieve the normal operation of the elevator function. Test Platform: Alteral company FPGA
Packet file list
(Preview for download)
lift.vhd
lift.vhd.bak
db\lift.asm.qmsg
..\lift.asm_labs.ddb
..\lift.cbx.xml
..\lift.cmp.bpm
..\lift.cmp.cdb
..\lift.cmp.ecobp
..\lift.cmp.hdb
..\lift.cmp.logdb
..\lift.cmp.rdb
..\lift.cmp.tdb
..\lift.cmp0.ddb
..\lift.db_info
..\lift.eco.cdb
..\lift.fit.qmsg
..\lift.hier_info
..\lift.hif
..\lift.map.bpm
..\lift.map.cdb
..\lift.map.ecobp
..\lift.map.hdb
..\lift.map.logdb
..\lift.map.qmsg
..\lift.map_bb.cdb
..\lift.map_bb.hdb
..\lift.map_bb.hdbx
..\lift.map_bb.logdb
..\lift.pre_map.cdb
..\lift.pre_map.hdb
..\lift.psp
..\lift.root_partition.cmp.atm
..\lift.root_partition.cmp.dfp
..\lift.root_partition.cmp.hdbx
..\lift.root_partition.cmp.logdb
..\lift.root_partition.cmp.rcf
..\lift.root_partition.map.atm
..\lift.root_partition.map.hdbx
..\lift.root_partition.map.info
..\lift.rtlv.hdb
..\lift.rtlv_sg.cdb
..\lift.rtlv_sg_swap.cdb
..\lift.sgdiff.cdb
..\lift.sgdiff.hdb
..\lift.signalprobe.cdb
..\lift.sld_design_entry.sci
..\lift.sld_design_entry_dsc.sci
..\lift.smp_dump.txt
..\lift.syn_hier_info
..\lift.tan.qmsg
..\lift.tis_db_list.ddb
..\lift.tmw_info
..\prev_cmp_lift.asm.qmsg
..\prev_cmp_lift.fit.qmsg
..\prev_cmp_lift.map.qmsg
..\prev_cmp_lift.qmsg
..\prev_cmp_lift.tan.qmsg
lift.asm.rpt
lift.done
lift.fit.rpt
lift.fit.smsg
lift.fit.summary
lift.flow.rpt
lift.map.rpt
lift.map.summary
lift.pin
lift.pof
lift.qpf
lift.qsf
lift.qws
lift.sof
lift.tan.rpt
lift.tan.summary
db
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