Software Engineering List Page 1190

Software Engineering list

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simulinkDsp28335 Downloaded：2: Use matlab/simulink for DSP (28335) programming, to avoid cumbersome procedures for the preparation and reduce the probability of errors
Date : 2025-07-15 Size : 774kb User : Rudolf
BP Downloaded：1: A certain refinery atmospheric column measured data and artificial test results (gasoline do). Assume that the input variables for the top temperature, reflux temperature, feed temperature, feed pressure, often a total o
Date : 2025-07-15 Size : 22kb User : Amy
Manley-P-STM32-board-schematics Downloaded：0: Manley+ STM32 board schematics,Manley+ STM32 board schematics
Date : 2025-07-15 Size : 82kb User : zhijun
Wildfire-stm32-board-schematics Downloaded：0: Wildfire stm32 board schematics,Wildfire stm32 board schematics
Date : 2025-07-15 Size : 100kb User : zhijun
SSD1963-driver-Program Downloaded：0: SSD1963 driver Program，SSD1963 driver Program
Date : 2025-07-15 Size : 148kb User : zhijun
pca Downloaded：0: PCA program with java neatbeans
Date : 2025-07-15 Size : 29kb User : filkom
crud Downloaded：0: cread update delete with PHP and Bootstrap
Date : 2025-07-15 Size : 3.08mb User : filkom
verilog-a-lrm-1-0 Downloaded：0: The information contained in this draft manual represents the definition of the Verilog-A hardware description language as proposed by OVI (Analog TSC) as of January, 1996. Open Verilog International makes no warranties
Date : 2025-07-15 Size : 211kb User : bkaraca
verilog-ieee Downloaded：0: The Verilog ¤ Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable an
Date : 2025-07-15 Size : 2.08mb User : bkaraca
SystemVerilog_3.1a Downloaded：0: Accellera Standards documents are developed within Accellera and the Technical Committees of Accellera Organization, Inc. Accellera develops its standards through a consensus development process, approved by its members
Date : 2025-07-15 Size : 2.82mb User : bkaraca
VerilogLangRefManual Downloaded：0: The information contained in this draft manual represents the definition of the Verilog hardware description language as it existed at the time Cadence Design Systems, Inc. transferred the language and its documentation
Date : 2025-07-15 Size : 1.18mb User : bkaraca
kursa4 Downloaded：0: program with matrics
Date : 2025-07-15 Size : 641kb User : irina2323

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