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DDR1_2_WITHOUTDQ

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 7.63mb
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  • Author :yas****
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DDR1 memory code in vhdl
Packet file list
(Preview for download)
DDR1_2_WITHOUTDQ\ddr.v
................\DDR1_2.gise
................\DDR1_2.ise
................\DDR1_2.ise_ISE_Backup
................\DDR1_2.ntrc_log
................\DDR1_2.restore
................\DDR1_2.xise
................\DDR1_2_ise11migration.zip
................\.......xdb\cst.xbcd
................\..........\tmp\ise\version
................\..........\...\...\__OBJSTORE__\common\HierarchicalDesign\HDProject
................\..........\...\...\............\......\..................\HDProject_StrTbl
................\..........\...\...\............\......\__stored_object_table__
................\..........\...\...\............\ExpandedNetlistEngine\Colors
................\..........\...\...\............\.....................\Colors_StrTbl
................\..........\...\...\............\.....................\Groups
................\..........\...\...\............\.....................\Groups_StrTbl
................\..........\...\...\............\HierarchicalDesign\HDProject\HDProject
................\..........\...\...\............\..................\.........\HDProject_StrTbl
................\..........\...\...\............\..................\__stored_object_table__
................\..........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
................\..........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
................\..........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
................\..........\...\...\............\................\................\dpm_project_main_StrTbl
................\..........\...\...\............\................Gui\CViewSelector
................\..........\...\...\............\...................\CViewSelector_StrTbl
................\..........\...\...\............\...................\File-SynthesisOnly
................\..........\...\...\............\...................\File-SynthesisOnly_StrTbl
................\..........\...\...\............\...................\GuiProjectData
................\..........\...\...\............\...................\GuiProjectData_StrTbl
................\..........\...\...\............\...................\Library-SynthesisOnly
................\..........\...\...\............\...................\Library-SynthesisOnly_StrTbl
................\..........\...\...\............\...................\Process-BehavioralSim-
................\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG
................\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl
................\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VHDL_ARCHITECTURE
................\..........\...\...\............\...................\Process-BehavioralSim-DESUT_VHDL_ARCHITECTURE_StrTbl
................\..........\...\...\............\...................\Process-BehavioralSim-_StrTbl
................\..........\...\...\............\...................\Process-PostTransSim-
................\..........\...\...\............\...................\Process-PostTransSim-_StrTbl
................\..........\...\...\............\...................\Process-SynthesisOnly-
................\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
................\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
................\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE
................\..........\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE_StrTbl
................\..........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
................\..........\...\...\............\...................\Source-BehavioralSim-AutoCompile
................\..........\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
................\..........\...\...\............\...................\Source-PostTransSim-AutoCompile
................\.
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