FPGA Verilog language used for the experimental development of the information board to improve a very good example code entry

Verilog_A\11 阶FIR 数字滤波器\db\fir.asm.qmsg
.........\...................\..\fir.asm_labs.ddb
.........\...................\..\fir.cbx.xml
.........\...................\..\fir.cmp.cdb
.........\...................\..\fir.cmp.hdb
.........\...................\..\fir.cmp.kpt
.........\...................\..\fir.cmp.logdb
.........\...................\..\fir.cmp.rdb
.........\...................\..\fir.cmp.tdb
.........\...................\..\fir.cmp0.ddb
.........\...................\..\fir.cmp2.ddb
.........\...................\..\fir.dbp
.........\...................\..\fir.db_info
.........\...................\..\fir.eco.cdb
.........\...................\..\fir.fit.qmsg
.........\...................\..\fir.hier_info
.........\...................\..\fir.hif
.........\...................\..\fir.map.cdb
.........\...................\..\fir.map.hdb
.........\...................\..\fir.map.logdb
.........\...................\..\fir.map.qmsg
.........\...................\..\fir.pre_map.cdb
.........\...................\..\fir.pre_map.hdb
.........\...................\..\fir.psp
.........\...................\..\fir.rtlv.hdb
.........\...................\..\fir.rtlv_sg.cdb
.........\...................\..\fir.rtlv_sg_swap.cdb
.........\...................\..\fir.sgdiff.cdb
.........\...................\..\fir.sgdiff.hdb
.........\...................\..\fir.signalprobe.cdb
.........\...................\..\fir.sld_design_entry.sci
.........\...................\..\fir.sld_design_entry_dsc.sci
.........\...................\..\fir.syn_hier_info
.........\...................\..\fir.tan.qmsg
.........\...................\fir.asm.rpt
.........\...................\fir.done
.........\...................\fir.fit.rpt
.........\...................\fir.fit.smsg
.........\...................\fir.fit.summary
.........\...................\fir.flow.rpt
.........\...................\fir.map.rpt
.........\...................\fir.map.summary
.........\...................\fir.pin
.........\...................\fir.pof
.........\...................\fir.qpf
.........\...................\fir.qsf
.........\...................\fir.qws
.........\...................\fir.sof
.........\...................\fir.tan.rpt
.........\...................\fir.tan.summary
.........\...................\fir.v
.........\.6 位高速数字相关器\correlator.qpf
.........\...................\correlator.qsf
.........\...................\correlator.qws
.........\...................\correlator.v
.........\...................\db\correlator.db_info
.........\...................\..\correlator.eco.cdb
.........\...................\..\correlator.sld_design_entry.sci
.........\256×16 RAM 块\db\altsyncram_j4a1.tdf
.........\..............\..\map_lpm_ram.asm.qmsg
.........\..............\..\map_lpm_ram.asm_labs.ddb
.........\..............\..\map_lpm_ram.cbx.xml
.........\..............\..\map_lpm_ram.cmp.cdb
.........\..............\..\map_lpm_ram.cmp.hdb
.........\..............\..\map_lpm_ram.cmp.kpt
.........\..............\..\map_lpm_ram.cmp.logdb
.........\..............\..\map_lpm_ram.cmp.rdb
.........\..............\..\map_lpm_ram.cmp.tdb
.........\..............\..\map_lpm_ram.cmp0.ddb
.........\..............\..\map_lpm_ram.cmp2.ddb
.........\..............\..\map_lpm_ram.dbp
.........\..............\..\map_lpm_ram.db_info
.........\..............\..\map_lpm_ram.eco.cdb
.........\..............\..\map_lpm_ram.fit.qmsg
.........\..............\..\map_lpm_ram.hier_info
.........\..............\..\map_lpm_ram.hif
.........\..............\..\map_lpm_ram.map.cdb
.........\..............\..\map_lpm_ram.map.hdb
.........\..............\..\map_lpm_ram.map.logdb
.........\..............\..\map_lpm_ram.map.qmsg
.........\..............\..\map_lpm_ram.pre_map.cdb
.........\..............\..\map_lpm_ram.pre_map.hdb
.........\..............\..\map_lpm_ram.psp
.........\..............\..\map_lpm_ram.rtlv.hdb
.........\..............\..\map_lpm_ram.rtlv_sg.cdb
.........\..............\..\map_lpm_ram.rtlv_sg_swap.cdb
.........\..............\..\map_lpm_ram.sgdiff.cdb
.........\..............\.

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