VHDL multiplexer (using case statement)

vhdl源程序
..........\8位数据锁存器.txt
..........\fifo.txt
..........\fpdiv_vhdl.txt
..........\multi_vhdl(4位乘法器).txt
..........\元件例化与层次设计.txt
..........\加法器：generate语句的应用.txt
..........\多路选择器 （使用case语句）.txt
..........\多路选择器（使用if－else语句）.txt
..........\多路选择器（使用select语句）.txt
..........\多路选择器（使用when－else语句）.txt
..........\将16进制转化为std_logic.txt
..........\最高优先级编码器.txt
..........\移位寄存器.txt
..........\经典双进程状态机（含test beach）.txt
..........\计数器：generate语句的应用.txt
..........\计数器：GENERIC语句的应用.txt
..........\计数器：std_logic_unsigned的用法.txt
..........\计数器：wait语句的应用.txt
..........\通用寄存器.txt

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