verilog code for some adders

design1\0.mgf
.......\1.mgf
.......\3.mgf
.......\bde.set
.......\compile\contents.lib~
.......\.......\design1.epr
.......\.......\design1.erf
.......\.......\design1.opt
.......\.......\mega.bin
.......\.......\mega.dbg
.......\.......\mega.elb
.......\.......\mega.itf
.......\.......\mega.mod
.......\.......\mega.off
.......\.......\sources.sth
.......\.......\vcp.mod
.......\.......\vcp.top
.......\.......\wave6.dat
.......\compile.cfg
.......\design1.adf
.......\design1.LIB
.......\design1.wsp
.......\elaboration.log
.......\log\console.log
.......\projlib.cfg
.......\src\demux\1-2 demux.v
.......\...\.....\1-2.awf
.......\...\.....\1-4.awf
.......\...\.....\1-4demux.v
.......\...\.....\1-4using1-2.awf
.......\...\.....\1-4using1-2.v
.......\...\.....\1-8demux.v
.......\...\.....\1-8using1-2.awf
.......\...\.....\1-8using1-2.v
.......\...\.....\1-8using1-4.awf
.......\...\.....\1-8using1-4.v
.......\...\.....\1_8demux.awf
.......\...\muxes\2-1 mux.awf
.......\...\.....\2-1 mux.v
.......\...\.....\4-1 mux using 2-1.awf
.......\...\.....\4-1 mux.v
.......\...\.....\4-1 muxes.awf
.......\...\.....\4-1mux using 2-1.v
.......\...\.....\8-1 mux using 4-1.v
.......\...\.....\8-1 mux.v
.......\...\.....\8-1 using 2-1.awf
.......\...\.....\8-1mux using 2-1.v
.......\...\.....\8-1mux using 4-1.awf
.......\...\.....\8-1mux.awf
.......\...\.....\full adder using mux.awf
.......\...\.....\full adder using mux.v
.......\...\.....\full sub using mux.awf
.......\...\.....\full sub using mux.v
.......\...\.....\func mux.awf
.......\...\.....\mux func.v
.......\...\demux
.......\...\muxes
.......\compile
.......\log
.......\src
design1

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