CPU design, including basic instruction set, to execute a simple program. Consider the CPU, registers, memory, and the relationship between instruction sets. That read and write registers, read and write memory and execution.

CPU Project\ACC.bsf
...........\ACC.vhd
...........\ALU.bsf
...........\ALU.vhd
...........\ALU.vhd.bak
...........\assignment_defaults.qdf
...........\BR.bsf
...........\BR.vhd
...........\CU2.bsf
...........\CU2.qpf
...........\CU2.qws
...........\CU2.vhd
...........\CU2.vhd.bak
...........\IR.bsf
...........\IR.vhd
...........\lpm_ram_dq0.bsf
...........\lpm_ram_dq0.cmp
...........\lpm_ram_dq0.vhd
...........\lpm_ram_dq0_wave0.jpg
...........\lpm_ram_dq0_wave1.jpg
...........\lpm_ram_dq0_waveforms.html
...........\MAR.bsf
...........\MAR.vhd
...........\MBR.bsf
...........\MBR.vhd
...........\MR.bsf
...........\MR.vhd
...........\MR.vhd.bak
...........\mul.mif
...........\mycpu.asm.rpt
...........\mycpu.cbx.xml
...........\mycpu.done
...........\mycpu.dpf
...........\mycpu.fit.rpt
...........\mycpu.fit.smsg
...........\mycpu.fit.summary
...........\mycpu.flow.rpt
...........\mycpu.map.rpt
...........\mycpu.map.summary
...........\mycpu.pin
...........\mycpu.pof
...........\mycpu.qsf
...........\mycpu.sim.rpt
...........\mycpu.sof
...........\mycpu.tan.rpt
...........\mycpu.tan.summary
...........\mycpu.vwf
...........\PC.bsf
...........\PC.vhd
...........\ram.mif
...........\together.bsf
...........\together.vhd
...........\TOP.bdf
...........\TOP.jpg
...........\db\altsyncram_avb1.tdf
...........\..\altsyncram_ovb1.tdf
...........\..\mux_0oc.tdf
...........\..\mux_frc.tdf
...........\..\mux_lpc.tdf
...........\..\mycpu.asm.qmsg
...........\..\mycpu.asm_labs.ddb
...........\..\mycpu.cbx.xml
...........\..\mycpu.cmp.bpm
...........\..\mycpu.cmp.cdb
...........\..\mycpu.cmp.ecobp
...........\..\mycpu.cmp.hdb
...........\..\mycpu.cmp.logdb
...........\..\mycpu.cmp.rdb
...........\..\mycpu.cmp.tdb
...........\..\mycpu.cmp0.ddb
...........\..\mycpu.cmp_bb.cdb
...........\..\mycpu.cmp_bb.hdb
...........\..\mycpu.cmp_bb.logdb
...........\..\mycpu.cmp_bb.rcf
...........\..\mycpu.dbp
...........\..\mycpu.db_info
...........\..\mycpu.eco.cdb
...........\..\mycpu.eds_overflow
...........\..\mycpu.fit.qmsg
...........\..\mycpu.fnsim.cdb
...........\..\mycpu.fnsim.hdb
...........\..\mycpu.fnsim.qmsg
...........\..\mycpu.hier_info
...........\..\mycpu.hif
...........\..\mycpu.map.bpm
...........\..\mycpu.map.cdb
...........\..\mycpu.map.ecobp
...........\..\mycpu.map.hdb
...........\..\mycpu.map.logdb
...........\..\mycpu.map.qmsg
...........\..\mycpu.map_bb.cdb
...........\..\mycpu.map_bb.hdb
...........\..\mycpu.map_bb.logdb
...........\..\mycpu.pre_map.cdb
...........\..\mycpu.pre_map.hdb
...........\..\mycpu.psp
...........\..\mycpu.pss
...........\..\mycpu.rtlv.hdb
...........\..\mycpu.rtlv_sg.cdb
...........\..\mycpu.rtlv_sg_swap.cdb

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