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mips_cpu_final

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 3.54mb
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  • Author :c*****
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Introduction - If you have any usage issues, please Google them yourself
this is a 8 bits mips cpu core which is writed by vhdl
Packet file list
(Preview for download)
mips_cpu_final\mips_cpu20101207\.lso
..............\................\.recordref
..............\................\adder_32bits.vhd
..............\................\adder_32bits_test.ant
..............\................\adder_32bits_test.jhd
..............\................\adder_32bits_test.tbw
..............\................\adder_32bits_test.udo
..............\................\adder_32bits_test.xwv
..............\................\adder_32bits_test.xwv_bak
..............\................\adder_32bits_test_bencher.prj
..............\................\alu.cmd_log
..............\................\alu.htm
..............\................\alu.sdc
..............\................\alu.spl
..............\................\alu.sym
..............\................\alu.vhd
..............\................\alu_controller.cmd_log
..............\................\alu_controller.htm
..............\................\alu_controller.sdc
..............\................\alu_controller.vhd
..............\................\alu_controller_open_file.tcl
..............\................\alu_controller_test.ant
..............\................\alu_controller_test.jhd
..............\................\alu_controller_test.tbw
..............\................\alu_controller_test.udo
..............\................\alu_controller_test.xwv
..............\................\alu_controller_test.xwv_bak
..............\................\alu_open_file.tcl
..............\................\alu_test.ant
..............\................\alu_test.jhd
..............\................\alu_test.tbw
..............\................\alu_test.udo
..............\................\alu_test.xwv
..............\................\alu_test.xwv_bak
..............\................\and_1bit.vhd
..............\................\AutoConstraint_mips_cpu_32bits.sdc
..............\................\bits_combine.vhd
..............\................\bits_combine_vhdl.prj
..............\................\bit_expand.vhd
..............\................\bit_expand_test.ant
..............\................\bit_expand_test.jhd
..............\................\bit_expand_test.tbw
..............\................\bit_expand_test.udo
..............\................\bit_expand_test.xwv
..............\................\bit_expand_test.xwv_bak
..............\................\bit_expand_test_bencher.prj
..............\................\bit_expand_vhdl.prj
..............\................\controller.cmd_log
..............\................\controller.htm
..............\................\controller.sdc
..............\................\controller.udo
..............\................\controller.vhd
..............\................\controller_open_file.tcl
..............\................\controller_test.ant
..............\................\controller_test.jhd
..............\................\controller_test.tbw
..............\................\controller_test.udo
..............\................\controller_test.xwv
..............\................\controller_test.xwv_bak
..............\................\controller_vhdl.prj
..............\................\datapath.cmd_log
..............\................\datapath.htm
..............\................\datapath.sdc
..............\................\datapath.srs
..............\................\datapath.vhd
..............\................\datapath_open_file.tcl
..............\................\datapath_vhdl.prj
..............\................\full_adder.vhd
..............\................\full_adder.vhd~
..............\................\iseconfig\mips_core.xreport
..............\................\.........\mips_cpu.projectmgr
..............\................\.........\mips_cpu_32bits.xreport
..............\................\.........\rom.xreport
..............\................\layer0.sro
..............\................\layer0.tlg
..............\................\mips_core.cmd_log
..............\................\mips_core.htm
..............\................\mips_core.sdc
..............\................\mips_core.vhd
..............\................\mips_core_open_file.tcl
..............\................\mips_core_sum
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