cortex_m1 verilog IP, synplify environment

cortex_m1\synplify_CortexM1\constraints\CortexM1DbgIntegration_actel-area.sdc
.........\.................\...........\CortexM1DbgIntegration_actel-speed.sdc
.........\.................\...........\CortexM1DbgIntegration_generic.sdc
.........\.................\...........\CortexM1Integration_actel-area.sdc
.........\.................\...........\CortexM1Integration_actel-speed.sdc
.........\.................\...........\CortexM1Integration_generic.sdc
.........\.................\CortexM1DbgIntegration_actel-area.v
.........\.................\CortexM1DbgIntegration_actel-speed.v
.........\.................\CortexM1DbgIntegration_generic.v
.........\.................\CortexM1Integration_actel-area.v
.........\.................\CortexM1Integration_actel-speed.v
.........\.................\CortexM1Integration_generic.v
.........\.................\ipinfo.txt
.........\.................\LICENSE.txt
.........\.................\LICENSE_AMBA.txt
.........\.................\README.txt
.........\.................\transcript
.........\.................\ipxact\busdefs
.........\.................\......\components
.........\.................\constraints
.........\.................\ipxact
.........\synplify_CortexM1
cortex_m1

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