Verilog OTP ROM source code

oc8051_rom\automake.log
..........\oc8051_rom.cmd_log
..........\oc8051_rom.dhp
..........\oc8051_rom.ise
..........\oc8051_rom.ise_ISE_Backup
..........\oc8051_rom.lso
..........\oc8051_rom.prj
..........\oc8051_rom.syr
..........\oc8051_rom.v
..........\oc8051_rom_summary.html
..........\oc8051_rom_vhdl.prj
..........\Project.dhp
..........\__ISE_repository_oc8051_rom.ise_.lock
..........\__projnav.log
..........\.........\ednTOngd_tcl.rsp
..........\.........\oc8051_rom.gfl
..........\.........\oc8051_rom.xst
..........\.........\oc8051_rom_flowplus.gfl
..........\.........\parentCreateTimingConstraintsApp_tcl.rsp
..........\.........\runXst_tcl.rsp
..........\.........\sumrpt_tcl.rsp
..........\xst\work\hdllib.ref
..........\...\....\vlg0D\oc8051__rom.bin
work\_info
....\rom99\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....8\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....7\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....6\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....5\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....4\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....3\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....2\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....1\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....0\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....\verilog.psm
....\....\_primary.dat
....\....\_primary.vhd
....\...89\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....8\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....7\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....6\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....5\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....4\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....3\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....2\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....1\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....0\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....\verilog.psm
....\....\_primary.dat
....\....\_primary.vhd
....\...79\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....8\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....7\verilog.psm
....\.....\_primary.dat
....\.....\_primary.vhd
....\....6\verilog.psm

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