This example shows how a Sm component is directly coded in VHDL as concurrent statements. The multiplexor is coded as a single "when" statement. "Sm" is mnemonic for subtractor-multiplexor.

Sm.vhd
ise_proj\fpga_int.bgn
........\fpga_int.bit
........\fpga_int.bld
........\fpga_int.cmd_log
........\fpga_int.drc
........\fpga_int.lso
........\fpga_int.ncd
........\fpga_int.ngc
........\fpga_int.ngd
........\fpga_int.ngr
........\fpga_int.pad
........\fpga_int.par
........\fpga_int.pcf
........\fpga_int.prj
........\fpga_int.ptwx
........\fpga_int.stx
........\fpga_int.syr
........\fpga_int.twr
........\fpga_int.twx
........\fpga_int.unroutes
........\fpga_int.ut
........\fpga_int.vhd
........\fpga_int.xpi
........\fpga_int.xst
........\fpga_int_guide.ncd
........\fpga_int_map.map
........\fpga_int_map.mrp
........\fpga_int_map.ncd
........\fpga_int_map.ngm
........\fpga_int_map.xrpt
........\fpga_int_ngdbuild.xrpt
........\fpga_int_pad.csv
........\fpga_int_pad.txt
........\fpga_int_par.xrpt
........\fpga_int_prev_built.ngd
........\fpga_int_summary.html
........\fpga_int_summary.xml
........\fpga_int_usage.xml
........\fpga_int_vhdl.prj
........\fpga_int_xst.xrpt
........\ise_proj.ise
........\ise_proj.ntrc_log
........\ise_proj.restore
........\........_xdb\cst.xbcd
........\............\tmp\ise\version
........\............\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
........\............\...\...\............\..................\.........\HDProject_StrTbl
........\............\...\...\............\..................\__stored_object_table__
........\............\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
........\............\...\...\............\.........\.......\RunOnce_tcl_StrTbl
........\............\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
........\............\...\...\............\................\................\dpm_project_main_StrTbl
........\............\...\...\............\................\__stored_objects__
........\............\...\...\............\................\__stored_objects___StrTbl
........\............\...\...\............\................\__stored_object_table__
........\............\...\...\............\................Gui\GuiProjectData
........\............\...\...\............\...................\GuiProjectData_StrTbl
........\............\...\...\............\xreport\Gc_RvReportViewer-Current-Module
........\............\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
........\............\...\...\............\.......\Gc_RvReportViewer-Module-Data-fpga_int
........\............\...\...\............\.......\Gc_RvReportViewer-Module-Data-fpga_int_StrTbl
........\............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
........\............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
........\............\...\...\..REGISTRY__\Autonym\regkeys
........\............\...\...\............\bitgen\regkeys
........\............\...\...\............\common\regkeys
........\............\...\...\............\.pldfit\regkeys
........\............\...\...\............\Cs\regkeys
........\............\...\...\............\dumpngdio\regkeys
........\............\...\...\............\ExpandedNetlistEngine\regkeys
........\............\...\...\............\fuse\regkeys
........\............\...\...\............\HierarchicalDesign\HDProject\regkeys
........\............\...\...\............\..................\regkeys
........\............\...\...\............\hprep6\regkeys
........\............\...\...\............\idem\regkeys
........\............\...\...\............\map\regkeys
........\............\...\...\............\netgen\regkeys
........\............\...\...\............\.gc2edif\regkeys
........\............\...\...\............\...build\regkeys
........\............\...\...\............\..dbuild\regkeys
........\............\...\...\............\par\regkeys
........\............\...\...\............\ProjectNavigator\regkeys
........\............\...\...\............\................Gui\regkeys
........\............\...\...\............\.......SeedData\ProcessProperties\regkeys
........\............\...\...\............\...............\...jectProp

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