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xapp514_aes3-audio

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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 4.28mb
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  • Author ：dc***
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Introduction - If you have any usage issues, please Google them yourself
AES-EBU interface,VHDL,VERILOG
Packet file list
(Preview for download)
FilenameSizeUpdate
project_files
.............\AES3_Spartan3E_Chipscope.cpj
.............\audio_fifo.xco
.............\icon.arg
.............\ila.arg
.............\vio.arg
Verilog
.......\aes_100_500_tonegen.v
.......\aes_crc.v
.......\aes_demo_top.ucf
.......\aes_demo_top.v
.......\aes_dru.v
.......\aes_dru_fixed_4X.v
.......\aes_framer.v
.......\aes_rx.v
.......\aes_rx_formatter.v
.......\aes_rx_rate_detect.v
.......\aes_tx.v
.......\aes_tx_clkdiv.v
.......\audio_pll.v
.......\lp.v
.......\pd.v
.......\spi.v
.......\vcodiv.v
VHDL
....\aes_100_500_tonegen.vhd
....\aes_crc.vhd
....\aes_demo_top.ucf
....\aes_demo_top.vhd
....\aes_dru.vhd
....\aes_dru_fixed_4X.vhd
....\aes_framer.vhd
....\aes_rx.vhd
....\aes_rx_formatter.vhd
....\aes_rx_rate_detect.vhd
....\aes_tx.vhd
....\aes_tx_clkdiv.vhd
AESEBUSPDIF&I2SAudio.pdf
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