CPU design with verilog hdl language.Instructions from MIPS.Something in detial is not perfect.

CPU多时钟周期\CPU_many.qpf
.............\CPU_many.qsf
.............\CPU_many.qws
.............\CPU_many.v
.............\CPU_many.v.bak
.............\CPU_many.vwf
.............\db\CPU_many.cbx.xml
.............\..\CPU_many.cmp.rdb
.............\..\CPU_many.cmp_merge.kpt
.............\..\CPU_many.db_info
.............\..\CPU_many.eco.cdb
.............\..\CPU_many.eds_overflow
.............\..\CPU_many.fnsim.cdb
.............\..\CPU_many.fnsim.hdb
.............\..\CPU_many.fnsim.qmsg
.............\..\CPU_many.hier_info
.............\..\CPU_many.hif
.............\..\CPU_many.lpc.html
.............\..\CPU_many.lpc.rdb
.............\..\CPU_many.lpc.txt
.............\..\CPU_many.map.bpm
.............\..\CPU_many.map.cdb
.............\..\CPU_many.map.ecobp
.............\..\CPU_many.map.hdb
.............\..\CPU_many.map.kpt
.............\..\CPU_many.map.logdb
.............\..\CPU_many.map.qmsg
.............\..\CPU_many.map_bb.cdb
.............\..\CPU_many.map_bb.hdb
.............\..\CPU_many.map_bb.logdb
.............\..\CPU_many.pre_map.cdb
.............\..\CPU_many.pre_map.hdb
.............\..\CPU_many.ram0_CPU_many_6290a79c.hdl.mif
.............\..\CPU_many.rpp.qmsg
.............\..\CPU_many.rtlv.hdb
.............\..\CPU_many.rtlv_sg.cdb
.............\..\CPU_many.rtlv_sg_swap.cdb
.............\..\CPU_many.sgate_sm.rvd
.............\..\CPU_many.sgdiff.cdb
.............\..\CPU_many.sgdiff.hdb
.............\..\CPU_many.sim.cvwf
.............\..\CPU_many.sim.hdb
.............\..\CPU_many.sim.qmsg
.............\..\CPU_many.sim.rdb
.............\..\CPU_many.simfam
.............\..\CPU_many.sld_design_entry.sci
.............\..\CPU_many.sld_design_entry_dsc.sci
.............\..\CPU_many.syn_hier_info
.............\..\CPU_many.tis_db_list.ddb
.............\..\CPU_many.tmw_info
.............\..\mux_ioc.tdf
.............\..\prev_cmp_CPU_many.map.qmsg
.............\..\prev_cmp_CPU_many.qmsg
.............\..\prev_cmp_CPU_many.sim.qmsg
.............\..\wed.wsf
.............\incremental_db\compiled_partitions\CPU_many.root_partition.map.atm
.............\..............\...................\CPU_many.root_partition.map.dpi
.............\..............\...................\CPU_many.root_partition.map.hdbx
.............\..............\...................\CPU_many.root_partition.map.kpt
.............\..............\README
.............\release\CPU_many.done
.............\.......\CPU_many.flow.rpt
.............\.......\CPU_many.map.rpt
.............\.......\CPU_many.map.smsg
.............\.......\CPU_many.map.summary
.............\.......\CPU_many.sim.rpt
.............\incremental_db\compiled_partitions
.............\db
.............\incremental_db
.............\release
CPU多时钟周期

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