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S1_12864lcd

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 365kb
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  • Author :陆***
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Introduction - If you have any usage issues, please Google them yourself
FPGA utility, test lcd12864, development environment for the Quartus II 8.0 (32-Bit), has been tested ok, for your reference learning
Packet file list
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S1_12864lcd\cmp_state.ini
...........\db\altsyncram_g5j.tdf
...........\..\altsyncram_h5j.tdf
...........\..\lcd0.asm.qmsg
...........\..\lcd0.asm_labs.ddb
...........\..\lcd0.cbx.xml
...........\..\lcd0.cmp.cdb
...........\..\lcd0.cmp.hdb
...........\..\lcd0.cmp.logdb
...........\..\lcd0.cmp.rdb
...........\..\lcd0.cmp.tdb
...........\..\lcd0.cmp0.ddb
...........\..\lcd0.cmp2.ddb
...........\..\lcd0.db_info
...........\..\lcd0.eco.cdb
...........\..\lcd0.fit.qmsg
...........\..\lcd0.hier_info
...........\..\lcd0.hif
...........\..\lcd0.map.cdb
...........\..\lcd0.map.hdb
...........\..\lcd0.map.logdb
...........\..\lcd0.map.qmsg
...........\..\lcd0.pre_map.cdb
...........\..\lcd0.pre_map.hdb
...........\..\lcd0.rtlv.hdb
...........\..\lcd0.rtlv_sg.cdb
...........\..\lcd0.rtlv_sg_swap.cdb
...........\..\lcd0.sgdiff.cdb
...........\..\lcd0.sgdiff.hdb
...........\..\lcd0.signalprobe.cdb
...........\..\lcd0.sim.vwf
...........\..\lcd0.sld_design_entry.sci
...........\..\lcd0.sld_design_entry_dsc.sci
...........\..\lcd0.smp_dump.txt
...........\..\lcd0.syn_hier_info
...........\..\lcd0.tan.qmsg
...........\..\lcd0.tis_db_list.ddb
...........\..\lcd0.tmw_info
...........\..\lcd0_sim.qrpt
...........\..\prev_cmp_lcd0.asm.qmsg
...........\..\prev_cmp_lcd0.fit.qmsg
...........\..\prev_cmp_lcd0.map.qmsg
...........\..\prev_cmp_lcd0.qmsg
...........\..\prev_cmp_lcd0.tan.qmsg
...........\..\rom0.hdl.mif
...........\..\rom1.hdl.mif
...........\..\rom2.hdl.mif
...........\..\rom3.hdl.mif
...........\lcd0.asm.rpt
...........\lcd0.cdf
...........\lcd0.done
...........\lcd0.fit.eqn
...........\lcd0.fit.rpt
...........\lcd0.fit.smsg
...........\lcd0.fit.summary
...........\lcd0.flow.rpt
...........\lcd0.map.eqn
...........\lcd0.map.rpt
...........\lcd0.map.summary
...........\lcd0.pin
...........\lcd0.pof
...........\lcd0.qpf
...........\lcd0.qsf
...........\lcd0.qws
...........\lcd0.sim.rpt
...........\lcd0.sof
...........\lcd0.tan.rpt
...........\lcd0.tan.summary
...........\lcd0.v
...........\lcd0.vwf
...........\lcd0_assignment_defaults.qdf
...........\db
S1_12864lcd
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