vhdl Design Example One: sequential logic, combinational logic design example

vhdl1\时序逻辑\8位数据锁存器.txt
.....\........\四D触发器：74175.txt
.....\........\带三态输出的8位D寄存器：74374.txt
.....\........\移位寄存器.txt
.....\........\移位寄存器：74164.txt
.....\........\通用寄存器.txt
.....\组合逻辑\8位总线收发器：74245.txt
.....\........\8位相等比较器.txt
.....\........\LED七段译码.txt
.....\........\三人表决器（三种不同的描述方式）.txt
.....\........\三态总线.txt
.....\........\二进制到BCD码转换.txt
.....\........\加法器描述.txt
.....\........\双2－4译码器：74139.txt
.....\........\双向总线.txt
.....\........\地址译码（for m68008）.txt
.....\........\多路选择器（使用if－else语句）.txt
.....\........\多路选择器（使用select语句）.txt
.....\........\多路选择器（使用when－else语句）.txt
.....\........\最高优先级编码器.txt
.....\........\汉明纠错吗编码器.txt
.....\........\汉明纠错吗译码器.txt
.....\........\解复用器.txt
.....\时序逻辑
.....\组合逻辑
vhdl1

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．