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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 388kb
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  • Author :wupe****
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Introduction - If you have any usage issues, please Google them yourself
This is a written with the four adder verilog, programming environment is xilinx ise10.1.
Packet file list
(Preview for download)
adder4\.lso
......\adder4.bgn
......\adder4.bit
......\adder4.bld
......\adder4.cmd_log
......\adder4.drc
......\adder4.ise
......\adder4.lfp
......\adder4.lso
......\adder4.mcs
......\adder4.ncd
......\adder4.ngc
......\adder4.ngd
......\adder4.ngr
......\adder4.ntrc_log
......\adder4.pad
......\adder4.par
......\adder4.pcf
......\adder4.prj
......\adder4.prm
......\adder4.ptwx
......\adder4.restore
......\adder4.sig
......\adder4.stx
......\adder4.syr
......\adder4.twr
......\adder4.twx
......\adder4.ucf
......\adder4.unroutes
......\adder4.ut
......\adder4.v
......\adder4.xpi
......\adder4.xst
......\adder4_fpga_editor.log
......\adder4_guide.ncd
......\adder4_map.map
......\adder4_map.mrp
......\adder4_map.ncd
......\adder4_map.ngm
......\adder4_map.xrpt
......\adder4_ngdbuild.xrpt
......\adder4_pad.csv
......\adder4_pad.txt
......\adder4_par.xrpt
......\adder4_prev_built.ngd
......\adder4_summary.html
......\adder4_summary.xml
......\adder4_usage.xml
......\.......xdb\cst.xbcd
......\..........\tmp\ise\version
......\..........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
......\..........\...\...\............\..................\.........\HDProject_StrTbl
......\..........\...\...\............\..................\__stored_object_table__
......\..........\...\...\............\ISimPlugin\SignalOrdering1\test_adder4_isim_beh.exe
......\..........\...\...\............\..........\...............\test_adder4_isim_beh.exe_StrTbl
......\..........\...\...\............\..........\...............\test_adder4_isim_par.exe
......\..........\...\...\............\..........\...............\test_adder4_isim_par.exe_StrTbl
......\..........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
......\..........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
......\..........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
......\..........\...\...\............\................\................\dpm_project_main_StrTbl
......\..........\...\...\............\................\................\NameMap
......\..........\...\...\............\................\................\NameMap_StrTbl
......\..........\...\...\............\................\__stored_objects__
......\..........\...\...\............\................\__stored_objects___StrTbl
......\..........\...\...\............\................\__stored_object_table__
......\..........\...\...\............\................Gui\GuiProjectData
......\..........\...\...\............\...................\GuiProjectData_StrTbl
......\..........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
......\..........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-adder4
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-Data-adder4_StrTbl
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
......\..........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
......\..........\...\...\..REGISTRY__\Autonym\regkeys
......\..........\...\...\............\bitgen\regkeys
......\..........\...\...\............\common\regkeys
......\..........\...\...\............\.pldfit\regkeys
......\..........\...\...\............\Cs\regkeys
......\..........\...\...\............\dumpngdio\regkeys
......\..........\...\...\............\fuse\regkeys
......\..........\...\...\............\HierarchicalDesign\HDProject\regkeys
......\..........\...\...\............\..................\regkeys
......\..........\...\...\............\hprep6\regkeys
......\..........\...\...\............\idem\regkeys
......\..........\...\...\............\ISimPlugin\regkeys
......\..........\...\...\............\map\regkeys
......\..........\...\...\............\netgen\regkeys
......\..........\...\...\............\.gc2edif\regkeys
......\..........\...\...\............\...build\regkeys
......\..........\...\...\............\..dbuild\regkeys
......\..........\...\...\............\par\regkeys
......\..
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