it s a very good example for fpga applying on the uart communition,which is compiled by VHDL

Uart\baud.bsf
....\baud.vhd
....\baud.vhd.bak
....\db\prev_cmp_Uart.qmsg
....\..\Uart.asm.qmsg
....\..\Uart.asm_labs.ddb
....\..\Uart.cbx.xml
....\..\Uart.cmp.bpm
....\..\Uart.cmp.cdb
....\..\Uart.cmp.ecobp
....\..\Uart.cmp.hdb
....\..\Uart.cmp.logdb
....\..\Uart.cmp.rdb
....\..\Uart.cmp.tdb
....\..\Uart.cmp0.ddb
....\..\Uart.cmp_bb.cdb
....\..\Uart.cmp_bb.hdb
....\..\Uart.cmp_bb.logdb
....\..\Uart.cmp_bb.rcf
....\..\Uart.dbp
....\..\Uart.db_info
....\..\Uart.eco.cdb
....\..\Uart.fit.qmsg
....\..\Uart.hier_info
....\..\Uart.hif
....\..\Uart.map.bpm
....\..\Uart.map.cdb
....\..\Uart.map.ecobp
....\..\Uart.map.hdb
....\..\Uart.map.logdb
....\..\Uart.map.qmsg
....\..\Uart.map_bb.cdb
....\..\Uart.map_bb.hdb
....\..\Uart.map_bb.logdb
....\..\Uart.pre_map.cdb
....\..\Uart.pre_map.hdb
....\..\Uart.psp
....\..\Uart.pss
....\..\Uart.rtlv.hdb
....\..\Uart.rtlv_sg.cdb
....\..\Uart.rtlv_sg_swap.cdb
....\..\Uart.sgdiff.cdb
....\..\Uart.sgdiff.hdb
....\..\Uart.signalprobe.cdb
....\..\Uart.sld_design_entry.sci
....\..\Uart.sld_design_entry_dsc.sci
....\..\Uart.smp_dump.txt
....\..\Uart.syn_hier_info
....\..\Uart.tan.qmsg
....\..\Uart.tis_db_list.ddb
....\db
....\reciever.bsf
....\reciever.vhd
....\transfer.bsf
....\transfer.vhd
....\Uart.asm.rpt
....\Uart.bdf
....\Uart.done
....\Uart.fit.rpt
....\Uart.fit.smsg
....\Uart.fit.summary
....\Uart.flow.rpt
....\Uart.map.rpt
....\Uart.map.summary
....\Uart.pin
....\Uart.pof
....\Uart.qpf
....\Uart.qsf
....\Uart.qws
....\Uart.sof
....\Uart.tan.rpt
....\Uart.tan.summary
Uart

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