Introduction - If you have any usage issues, please Google them yourself
experimental code written in Verilog HDL language,ROM configuration based on M4K block for the character data storage and VGA display, pin assignment for the EP2C8Q208 21EDA development board, for a detailed explanation you can see 《Lesson30:SF-EP1C开发板实验9——基于M4K块配置ROM的字符数据存储VGA显示实验》in the book《深入浅出玩转FPGA》.